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| author | Benoît Thébaudeau <benoit.thebaudeau@advansee.com> | 2012-09-27 10:24:37 +0000 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2012-10-15 11:54:12 -0700 |
| commit | 323846561a7253433818d0e04630cb83433fa0f1 (patch) | |
| tree | 1b37ec812ec221c6e069e5c9c9d5c11cae0c328d /arch/arm/include | |
| parent | be2f93b1ea03adc9409ae3243ae4c3b831f098ae (diff) | |
| download | u-boot-imx-323846561a7253433818d0e04630cb83433fa0f1.zip u-boot-imx-323846561a7253433818d0e04630cb83433fa0f1.tar.gz u-boot-imx-323846561a7253433818d0e04630cb83433fa0f1.tar.bz2 | |
mx5/6 clocks: Fix SDHC clocks
The i.MX5 eSDHC clocks were considered as coming from the IPG clock although
they have dedicated clock paths.
Also, on i.MX5/6, each SDHC instance has a dedicated clock, so gd->sdhc_clk must
be set accordingly. This is good for the case only a single SDHC instance is
used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix
the multi-instance use case (initialization made directly with
fsl_esdhc_initialize()).
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-mx5/clock.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx5/clock.h b/arch/arm/include/asm/arch-mx5/clock.h index 83fb877..9cdfb48 100644 --- a/arch/arm/include/asm/arch-mx5/clock.h +++ b/arch/arm/include/asm/arch-mx5/clock.h @@ -45,6 +45,10 @@ enum mxc_clock { MXC_IPG_PERCLK, MXC_UART_CLK, MXC_CSPI_CLK, + MXC_ESDHC_CLK, + MXC_ESDHC2_CLK, + MXC_ESDHC3_CLK, + MXC_ESDHC4_CLK, MXC_FEC_CLK, MXC_SATA_CLK, MXC_DDR_CLK, |