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| author | Linus Walleij <linus.walleij@linaro.org> | 2015-03-09 10:53:21 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-03-09 11:13:29 -0400 |
| commit | 23b5877c64562a314f8d8c60d0066cd346f2d886 (patch) | |
| tree | 637ae686c8cda5a7c7d28216bf7d4c1f79f0f945 /arch/arm/include | |
| parent | 671fa63e79053c33456c198c1e0f74262b0b2548 (diff) | |
| download | u-boot-imx-23b5877c64562a314f8d8c60d0066cd346f2d886.zip u-boot-imx-23b5877c64562a314f8d8c60d0066cd346f2d886.tar.gz u-boot-imx-23b5877c64562a314f8d8c60d0066cd346f2d886.tar.bz2 | |
armv8/vexpress64: make multientry conditional
While the Freescale ARMv8 board LS2085A will enter U-Boot both
on a master and a secondary (slave) CPU, this is not the common
behaviour on ARMv8 platforms. The norm is that U-Boot is entered
from the master CPU only, while the other CPUs are kept in
WFI (wait for interrupt) state.
The code determining which CPU we are running on is using the
MPIDR register, but the definition of that register varies with
platform to some extent, and handling multi-cluster platforms
(such as the Juno) will become cumbersome. It is better to only
enable the multiple entry code on machines that actually need
it and disable it by default.
Make the single entry default and add a special
ARMV8_MULTIENTRY KConfig option to be used by the
platforms that need multientry and set it for the LS2085A.
Delete all use of the CPU_RELEASE_ADDR from the Vexpress64
boards as it is just totally unused and misleading, and
make it conditional in the generic start.S code.
This makes the Juno platform start U-Boot properly.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/macro.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h index 1c8c425..3b3146a 100644 --- a/arch/arm/include/asm/macro.h +++ b/arch/arm/include/asm/macro.h @@ -78,6 +78,8 @@ lr .req x30 * choose processor with all zero affinity value as the master. */ .macro branch_if_slave, xreg, slave_label +#ifdef CONFIG_ARMV8_MULTIENTRY + /* NOTE: MPIDR handling will be erroneous on multi-cluster machines */ mrs \xreg, mpidr_el1 tst \xreg, #0xff /* Test Affinity 0 */ b.ne \slave_label @@ -90,6 +92,7 @@ lr .req x30 lsr \xreg, \xreg, #16 tst \xreg, #0xff /* Test Affinity 3 */ b.ne \slave_label +#endif .endm /* @@ -97,12 +100,17 @@ lr .req x30 * choose processor with all zero affinity value as the master. */ .macro branch_if_master, xreg1, xreg2, master_label +#ifdef CONFIG_ARMV8_MULTIENTRY + /* NOTE: MPIDR handling will be erroneous on multi-cluster machines */ mrs \xreg1, mpidr_el1 lsr \xreg2, \xreg1, #32 lsl \xreg1, \xreg1, #40 lsr \xreg1, \xreg1, #40 orr \xreg1, \xreg1, \xreg2 cbz \xreg1, \master_label +#else + b \master_label +#endif .endm .macro armv8_switch_to_el2_m, xreg1 |