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authorSRICHARAN R <r.sricharan@ti.com>2012-05-17 00:12:07 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-07-07 14:07:22 +0200
commit77efdeb7588aeae585fcde7e59cc8693df592fd7 (patch)
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ARM: OMAP5: dmm: Create a tiler trap section.
The unmapped entries in tiler space are set with values 0xFF. So creating a DMM section of size 16MB at 0xFF000000 with ADDRSPACE set to 0x2. This way all the unmapped entry accesses to tiler will be trapped by the EMIF and a error response is sent to the L3 interconnect. L3 errors are inturn reported to MPU. Note that here the tiler trap section is overlapping with the actual ddr physical space and we lose 16MB out of the total 2GB. Signed-off-by: R Sricharan <r.sricharan@ti.com>
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