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author | Michal Simek <michal.simek@xilinx.com> | 2013-04-22 15:21:33 +0200 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2013-04-30 11:39:28 +0200 |
commit | 8934f7846501070a5b01c1fab5db27559e9d70d1 (patch) | |
tree | 56012200ad94320370944669f7ab2427902366f3 /arch/arm/include/asm/arch-zynq/hardware.h | |
parent | 293eb33fcb95e2b2bae71edf97b0ca3bdd6ba98d (diff) | |
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i2c: zynq: Add support for Xilinx Zynq
Support Xilinx Zynq i2c controller.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-zynq/hardware.h')
-rw-r--r-- | arch/arm/include/asm/arch-zynq/hardware.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-zynq/hardware.h b/arch/arm/include/asm/arch-zynq/hardware.h index 8eb4e1a..6af892a 100644 --- a/arch/arm/include/asm/arch-zynq/hardware.h +++ b/arch/arm/include/asm/arch-zynq/hardware.h @@ -31,6 +31,8 @@ #define ZYNQ_GEM_BASEADDR1 0xE000C000 #define ZYNQ_SDHCI_BASEADDR0 0xE0100000 #define ZYNQ_SDHCI_BASEADDR1 0xE0101000 +#define ZYNQ_I2C_BASEADDR0 0xE0004000 +#define ZYNQ_I2C_BASEADDR1 0xE0005000 /* Reflect slcr offsets */ struct slcr_regs { |