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author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2015-10-14 10:46:36 +0200 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2015-10-14 10:46:36 +0200 |
commit | 13a3972585af60ec367d209cedbd3601e0c77467 (patch) | |
tree | 4b3312669b3e501f6bc10b39d8c7bbf516f07aac /arch/arm/include/asm/arch-tegra | |
parent | 208bd51396fb606dbdcf45b064e6b372d7dd3e81 (diff) | |
parent | 297faccca2235e359012118495b9b73451d54bb9 (diff) | |
download | u-boot-imx-13a3972585af60ec367d209cedbd3601e0c77467.zip u-boot-imx-13a3972585af60ec367d209cedbd3601e0c77467.tar.gz u-boot-imx-13a3972585af60ec367d209cedbd3601e0c77467.tar.bz2 |
Merge remote-tracking branch 'u-boot/master'
Diffstat (limited to 'arch/arm/include/asm/arch-tegra')
-rw-r--r-- | arch/arm/include/asm/arch-tegra/clock.h | 7 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra/dc.h | 2 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra/gpio.h | 9 |
3 files changed, 5 insertions, 13 deletions
diff --git a/arch/arm/include/asm/arch-tegra/clock.h b/arch/arm/include/asm/arch-tegra/clock.h index d570d7f..e56031d 100644 --- a/arch/arm/include/asm/arch-tegra/clock.h +++ b/arch/arm/include/asm/arch-tegra/clock.h @@ -44,6 +44,9 @@ enum { /* return the current oscillator clock frequency */ enum clock_osc_freq clock_get_osc_freq(void); +/* return the clk_m frequency */ +unsigned int clk_m_get_rate(unsigned int parent_rate); + /** * Start PLL using the provided configuration parameters. * @@ -338,8 +341,8 @@ void arch_timer_init(void); void tegra30_set_up_pllp(void); -/* Number of PLL-based clocks (i.e. not OSC or 32KHz) */ -#define CLOCK_ID_PLL_COUNT (CLOCK_ID_COUNT - 2) +/* Number of PLL-based clocks (i.e. not OSC, MCLK or 32KHz) */ +#define CLOCK_ID_PLL_COUNT (CLOCK_ID_COUNT - 3) struct clk_pll_info { u32 m_shift:5; /* DIVM_SHIFT */ diff --git a/arch/arm/include/asm/arch-tegra/dc.h b/arch/arm/include/asm/arch-tegra/dc.h index 6ffb468..3a87f0b 100644 --- a/arch/arm/include/asm/arch-tegra/dc.h +++ b/arch/arm/include/asm/arch-tegra/dc.h @@ -364,8 +364,6 @@ struct dc_ctlr { struct dc_winbuf_reg winbuf; /* WINBUF A/B/C 0x800 ~ 0x80d */ }; -#define BIT(pos) (1U << pos) - /* DC_CMD_DISPLAY_COMMAND 0x032 */ #define CTRL_MODE_SHIFT 5 #define CTRL_MODE_MASK (0x3 << CTRL_MODE_SHIFT) diff --git a/arch/arm/include/asm/arch-tegra/gpio.h b/arch/arm/include/asm/arch-tegra/gpio.h index 7334e0c..daf5698 100644 --- a/arch/arm/include/asm/arch-tegra/gpio.h +++ b/arch/arm/include/asm/arch-tegra/gpio.h @@ -28,15 +28,6 @@ struct tegra_gpio_config { }; /** - * tegra_spl_gpio_direction_output() - set the output value of a GPIO - * - * This function is only used from SPL on seaboard, which needs to enable a - * GPIO to get the UART running. It could be done in U-Boot rather than SPL, - * but for now, this gets it working - */ -int tegra_spl_gpio_direction_output(int gpio, int value); - -/** * Configure a list of GPIOs * * @param config List of GPIO configurations |