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authorAllen Martin <amartin@nvidia.com>2013-03-16 18:58:03 +0000
committerTom Warren <twarren@nvidia.com>2013-03-25 09:56:05 -0700
commitff1da6fb5fe50ac15dd988e81a782a4599102424 (patch)
treebd1c39244a7edbbce947bce61256da19c187bee9 /arch/arm/include/asm/arch-tegra
parent9000652da0893af8a07f81622b3ef8de6c8725bb (diff)
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tegra: spi: rename tegra SPI drivers
Rename tegra SPI drivers to tegra20_flash and tegra20_slink in preparation for commonization and addition of tegra114_spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/include/asm/arch-tegra')
-rw-r--r--arch/arm/include/asm/arch-tegra/tegra_slink.h84
-rw-r--r--arch/arm/include/asm/arch-tegra/tegra_spi.h75
2 files changed, 0 insertions, 159 deletions
diff --git a/arch/arm/include/asm/arch-tegra/tegra_slink.h b/arch/arm/include/asm/arch-tegra/tegra_slink.h
deleted file mode 100644
index 74804b5..0000000
--- a/arch/arm/include/asm/arch-tegra/tegra_slink.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * NVIDIA Tegra SPI-SLINK controller
- *
- * Copyright 2010-2013 NVIDIA Corporation
- *
- * This software may be used and distributed according to the
- * terms of the GNU Public License, Version 2, incorporated
- * herein by reference.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * Version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _TEGRA_SLINK_H_
-#define _TEGRA_SLINK_H_
-
-#include <asm/types.h>
-
-struct slink_tegra {
- u32 command; /* SLINK_COMMAND_0 register */
- u32 command2; /* SLINK_COMMAND2_0 reg */
- u32 status; /* SLINK_STATUS_0 register */
- u32 reserved; /* Reserved offset 0C */
- u32 mas_data; /* SLINK_MAS_DATA_0 reg */
- u32 slav_data; /* SLINK_SLAVE_DATA_0 reg */
- u32 dma_ctl; /* SLINK_DMA_CTL_0 register */
- u32 status2; /* SLINK_STATUS2_0 reg */
- u32 rsvd[56]; /* 0x20 to 0xFF reserved */
- u32 tx_fifo; /* SLINK_TX_FIFO_0 reg off 100h */
- u32 rsvd2[31]; /* 0x104 to 0x17F reserved */
- u32 rx_fifo; /* SLINK_RX_FIFO_0 reg off 180h */
-};
-
-/* COMMAND */
-#define SLINK_CMD_ENB (1 << 31)
-#define SLINK_CMD_GO (1 << 30)
-#define SLINK_CMD_M_S (1 << 28)
-#define SLINK_CMD_CK_SDA (1 << 21)
-#define SLINK_CMD_CS_POL (1 << 13)
-#define SLINK_CMD_CS_VAL (1 << 12)
-#define SLINK_CMD_CS_SOFT (1 << 11)
-#define SLINK_CMD_BIT_LENGTH (1 << 4)
-#define SLINK_CMD_BIT_LENGTH_MASK 0x0000001F
-/* COMMAND2 */
-#define SLINK_CMD2_TXEN (1 << 30)
-#define SLINK_CMD2_RXEN (1 << 31)
-#define SLINK_CMD2_SS_EN (1 << 18)
-#define SLINK_CMD2_SS_EN_SHIFT 18
-#define SLINK_CMD2_SS_EN_MASK 0x000C0000
-#define SLINK_CMD2_CS_ACTIVE_BETWEEN (1 << 17)
-/* STATUS */
-#define SLINK_STAT_BSY (1 << 31)
-#define SLINK_STAT_RDY (1 << 30)
-#define SLINK_STAT_ERR (1 << 29)
-#define SLINK_STAT_RXF_FLUSH (1 << 27)
-#define SLINK_STAT_TXF_FLUSH (1 << 26)
-#define SLINK_STAT_RXF_OVF (1 << 25)
-#define SLINK_STAT_TXF_UNR (1 << 24)
-#define SLINK_STAT_RXF_EMPTY (1 << 23)
-#define SLINK_STAT_RXF_FULL (1 << 22)
-#define SLINK_STAT_TXF_EMPTY (1 << 21)
-#define SLINK_STAT_TXF_FULL (1 << 20)
-#define SLINK_STAT_TXF_OVF (1 << 19)
-#define SLINK_STAT_RXF_UNR (1 << 18)
-#define SLINK_STAT_CUR_BLKCNT (1 << 15)
-/* STATUS2 */
-#define SLINK_STAT2_RXF_FULL_CNT (1 << 16)
-#define SLINK_STAT2_TXF_FULL_CNT (1 << 0)
-
-#define SPI_TIMEOUT 1000
-#define TEGRA_SPI_MAX_FREQ 52000000
-
-#endif /* _TEGRA_SLINK_H_ */
diff --git a/arch/arm/include/asm/arch-tegra/tegra_spi.h b/arch/arm/include/asm/arch-tegra/tegra_spi.h
deleted file mode 100644
index d53a93f..0000000
--- a/arch/arm/include/asm/arch-tegra/tegra_spi.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * NVIDIA Tegra20 SPI-FLASH controller
- *
- * Copyright 2010-2012 NVIDIA Corporation
- *
- * This software may be used and distributed according to the
- * terms of the GNU Public License, Version 2, incorporated
- * herein by reference.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * Version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _TEGRA_SPI_H_
-#define _TEGRA_SPI_H_
-
-#include <asm/types.h>
-
-struct spi_tegra {
- u32 command; /* SPI_COMMAND_0 register */
- u32 status; /* SPI_STATUS_0 register */
- u32 rx_cmp; /* SPI_RX_CMP_0 register */
- u32 dma_ctl; /* SPI_DMA_CTL_0 register */
- u32 tx_fifo; /* SPI_TX_FIFO_0 register */
- u32 rsvd[3]; /* offsets 0x14 to 0x1F reserved */
- u32 rx_fifo; /* SPI_RX_FIFO_0 register */
-};
-
-#define SPI_CMD_GO (1 << 30)
-#define SPI_CMD_ACTIVE_SCLK_SHIFT 26
-#define SPI_CMD_ACTIVE_SCLK_MASK (3 << SPI_CMD_ACTIVE_SCLK_SHIFT)
-#define SPI_CMD_CK_SDA (1 << 21)
-#define SPI_CMD_ACTIVE_SDA_SHIFT 18
-#define SPI_CMD_ACTIVE_SDA_MASK (3 << SPI_CMD_ACTIVE_SDA_SHIFT)
-#define SPI_CMD_CS_POL (1 << 16)
-#define SPI_CMD_TXEN (1 << 15)
-#define SPI_CMD_RXEN (1 << 14)
-#define SPI_CMD_CS_VAL (1 << 13)
-#define SPI_CMD_CS_SOFT (1 << 12)
-#define SPI_CMD_CS_DELAY (1 << 9)
-#define SPI_CMD_CS3_EN (1 << 8)
-#define SPI_CMD_CS2_EN (1 << 7)
-#define SPI_CMD_CS1_EN (1 << 6)
-#define SPI_CMD_CS0_EN (1 << 5)
-#define SPI_CMD_BIT_LENGTH (1 << 4)
-#define SPI_CMD_BIT_LENGTH_MASK 0x0000001F
-
-#define SPI_STAT_BSY (1 << 31)
-#define SPI_STAT_RDY (1 << 30)
-#define SPI_STAT_RXF_FLUSH (1 << 29)
-#define SPI_STAT_TXF_FLUSH (1 << 28)
-#define SPI_STAT_RXF_UNR (1 << 27)
-#define SPI_STAT_TXF_OVF (1 << 26)
-#define SPI_STAT_RXF_EMPTY (1 << 25)
-#define SPI_STAT_RXF_FULL (1 << 24)
-#define SPI_STAT_TXF_EMPTY (1 << 23)
-#define SPI_STAT_TXF_FULL (1 << 22)
-#define SPI_STAT_SEL_TXRX_N (1 << 16)
-#define SPI_STAT_CUR_BLKCNT (1 << 15)
-
-#define SPI_TIMEOUT 1000
-#define TEGRA_SPI_MAX_FREQ 52000000
-
-#endif /* _TEGRA_SPI_H_ */