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author | Tom Warren <twarren.nvidia@gmail.com> | 2014-01-24 10:16:22 -0700 |
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committer | Tom Warren <twarren@nvidia.com> | 2014-02-03 09:46:45 -0700 |
commit | c82014daf5ed8030d2ec5903bd51b5ab817fb000 (patch) | |
tree | 6f3ef330baf44f4cbc6bfa304b9d557e0c074dac /arch/arm/include/asm/arch-tegra/clk_rst.h | |
parent | 04b8e8e7452a4cd00003e33a5a736bd077ff3471 (diff) | |
download | u-boot-imx-c82014daf5ed8030d2ec5903bd51b5ab817fb000.zip u-boot-imx-c82014daf5ed8030d2ec5903bd51b5ab817fb000.tar.gz u-boot-imx-c82014daf5ed8030d2ec5903bd51b5ab817fb000.tar.bz2 |
ARM: tegra: implement MASK_BITS_31_29
Some clock sources have 3-bit muxes in bits 31:29. Implement core
support for this mux field.
Signed-off-by: Tom Warren <twarren@nvidia.com>
[swarren, extracted from a larger patch by Tom]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/include/asm/arch-tegra/clk_rst.h')
-rw-r--r-- | arch/arm/include/asm/arch-tegra/clk_rst.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-tegra/clk_rst.h b/arch/arm/include/asm/arch-tegra/clk_rst.h index 9f81237..f07b83d 100644 --- a/arch/arm/include/asm/arch-tegra/clk_rst.h +++ b/arch/arm/include/asm/arch-tegra/clk_rst.h @@ -236,6 +236,9 @@ enum { #define OUT_CLK_SOURCE_31_30_SHIFT 30 #define OUT_CLK_SOURCE_31_30_MASK (3U << OUT_CLK_SOURCE_31_30_SHIFT) +#define OUT_CLK_SOURCE_31_29_SHIFT 29 +#define OUT_CLK_SOURCE_31_29_MASK (7U << OUT_CLK_SOURCE_31_29_SHIFT) + /* Note: See comment for MASK_BITS_31_28 in arch-tegra/clock.h */ #define OUT_CLK_SOURCE_31_28_SHIFT 28 #define OUT_CLK_SOURCE_31_28_MASK (15U << OUT_CLK_SOURCE_31_28_SHIFT) |