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authorPaul Kocialkowski <contact@paulk.fr>2015-03-22 18:12:22 +0100
committerHans de Goede <hdegoede@redhat.com>2015-04-15 16:17:17 +0200
commit487b3277d4f70bcb2e4a1930beb6438565f25910 (patch)
treecc74dd0cd05c1be8af48cd1ca95c4b6f949b8712 /arch/arm/include/asm/arch-sunxi
parent81f11872f3315a767940820e46d1a15b42d9b60c (diff)
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sunxi: GPIO pin mux hardware-feature-specific function index defines
Each hardware feature exposed through the GPIO pin mux is usually using the same function index (for a given port), so there is no need to define one value per pin: one value per hardware feature per port is sufficient, avoids duplication and makes everything easier to understand. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'arch/arm/include/asm/arch-sunxi')
-rw-r--r--arch/arm/include/asm/arch-sunxi/gpio.h60
1 files changed, 19 insertions, 41 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
index 3a4b8c3..a6b15d6 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -142,59 +142,37 @@ enum sunxi_gpio_number {
#define SUNXI_GPIO_INPUT 0
#define SUNXI_GPIO_OUTPUT 1
-#define SUNXI_GPA0_EMAC 2
-#define SUN6I_GPA0_GMAC 2
-#define SUN7I_GPA0_GMAC 5
+#define SUNXI_GPA_EMAC 2
+#define SUN6I_GPA_GMAC 2
+#define SUN7I_GPA_GMAC 5
-#define SUNXI_GPB0_TWI0 2
+#define SUNXI_GPB_TWI0 2
+#define SUN4I_GPB_UART0 2
+#define SUN5I_GPB_UART0 2
-#define SUN4I_GPB22_UART0_TX 2
-#define SUN4I_GPB23_UART0_RX 2
+#define SUNXI_GPC_SDC2 3
-#define SUN5I_GPB19_UART0_TX 2
-#define SUN5I_GPB20_UART0_RX 2
+#define SUNXI_GPD_LCD0 2
+#define SUNXI_GPD_LVDS0 3
-#define SUNXI_GPC6_SDC2 3
+#define SUNXI_GPF_SDC0 2
+#define SUNXI_GPF_UART0 4
+#define SUN8I_GPF_UART0 3
-#define SUNXI_GPD0_LCD0 2
-#define SUNXI_GPD0_LVDS0 3
+#define SUN5I_GPG_SDC1 2
+#define SUN5I_GPG_UART1 4
-#define SUNXI_GPF0_SDC0 2
+#define SUN6I_GPH_UART0 2
-#define SUNXI_GPF2_SDC0 2
-
-#ifdef CONFIG_MACH_SUN8I
-#define SUNXI_GPF2_UART0_TX 3
-#define SUNXI_GPF4_UART0_RX 3
-#else
-#define SUNXI_GPF2_UART0_TX 4
-#define SUNXI_GPF4_UART0_RX 4
-#endif
-
-#define SUN4I_GPG0_SDC1 4
-
-#define SUN5I_GPG3_SDC1 2
-
-#define SUN5I_GPG3_UART1_TX 4
-#define SUN5I_GPG4_UART1_RX 4
-
-#define SUN4I_GPH22_SDC1 5
-
-#define SUN6I_GPH20_UART0_TX 2
-#define SUN6I_GPH21_UART0_RX 2
-
-#define SUN4I_GPI4_SDC3 2
+#define SUN4I_GPI_SDC3 2
#define SUN6I_GPL0_R_P2WI_SCK 3
#define SUN6I_GPL1_R_P2WI_SDA 3
-#define SUN8I_GPL0_R_RSB_SCK 2
-#define SUN8I_GPL1_R_RSB_SDA 2
-#define SUN8I_GPL2_R_UART_TX 2
-#define SUN8I_GPL3_R_UART_RX 2
+#define SUN8I_GPL_R_RSB 2
+#define SUN8I_GPL_R_UART 2
-#define SUN9I_GPN0_R_RSB_SCK 3
-#define SUN9I_GPN1_R_RSB_SDA 3
+#define SUN9I_GPN_R_RSB 3
/* GPIO pin pull-up/down config */
#define SUNXI_GPIO_PULL_DISABLE 0