diff options
author | Hans de Goede <hdegoede@redhat.com> | 2014-11-29 13:38:35 +0100 |
---|---|---|
committer | Hans de Goede <hdegoede@redhat.com> | 2015-01-14 14:56:36 +0100 |
commit | 66ebea06f71a85552b7339d1b03ec1a092dc6c70 (patch) | |
tree | 43494b5240df365bf20f78d77b09390afd18b229 /arch/arm/include/asm/arch-sunxi | |
parent | ce881076fc51f281ab28b2a1fde370f10b0c41eb (diff) | |
download | u-boot-imx-66ebea06f71a85552b7339d1b03ec1a092dc6c70.zip u-boot-imx-66ebea06f71a85552b7339d1b03ec1a092dc6c70.tar.gz u-boot-imx-66ebea06f71a85552b7339d1b03ec1a092dc6c70.tar.bz2 |
sunxi: Add support for the rsb (Reduced Serial Bus)
sun8i (A23) introduces a new bus for communicating with the pmic, the rsb,
the rsb is also used to communicate with the pmic on the A80, and is
documented in the A80 user manual.
This commit adds support for this based on the rsb driver from the allwinner
u-boot sources.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Diffstat (limited to 'arch/arm/include/asm/arch-sunxi')
-rw-r--r-- | arch/arm/include/asm/arch-sunxi/cpu.h | 1 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-sunxi/gpio.h | 2 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-sunxi/prcm.h | 3 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-sunxi/rsb.h | 55 |
4 files changed, 60 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/cpu.h b/arch/arm/include/asm/arch-sunxi/cpu.h index adf203a..bcfa00d 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu.h +++ b/arch/arm/include/asm/arch-sunxi/cpu.h @@ -129,6 +129,7 @@ #define SUNXI_R_UART_BASE 0x01f02800 #define SUNXI_R_PIO_BASE 0x01f02c00 #define SUN6I_P2WI_BASE 0x01f03400 +#define SUNXI_RSB_BASE 0x01f03400 /* CoreSight Debug Module */ #define SUNXI_CSDM_BASE 0x3f500000 diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h index 9f972ce..6623f15 100644 --- a/arch/arm/include/asm/arch-sunxi/gpio.h +++ b/arch/arm/include/asm/arch-sunxi/gpio.h @@ -176,6 +176,8 @@ enum sunxi_gpio_number { #define SUN6I_GPL0_R_P2WI_SCK 3 #define SUN6I_GPL1_R_P2WI_SDA 3 +#define SUN8I_GPL0_R_RSB_SCK 2 +#define SUN8I_GPL1_R_RSB_SDA 2 #define SUN8I_GPL2_R_UART_TX 2 #define SUN8I_GPL3_R_UART_RX 2 diff --git a/arch/arm/include/asm/arch-sunxi/prcm.h b/arch/arm/include/asm/arch-sunxi/prcm.h index 88de1ff..82ed541 100644 --- a/arch/arm/include/asm/arch-sunxi/prcm.h +++ b/arch/arm/include/asm/arch-sunxi/prcm.h @@ -50,7 +50,8 @@ #define PRCM_APB0_GATE_PIO (0x1 << 0) #define PRCM_APB0_GATE_IR (0x1 << 1) #define PRCM_APB0_GATE_TIMER01 (0x1 << 2) -#define PRCM_APB0_GATE_P2WI (0x1 << 3) +#define PRCM_APB0_GATE_P2WI (0x1 << 3) /* sun6i */ +#define PRCM_APB0_GATE_RSB (0x1 << 3) /* sun8i */ #define PRCM_APB0_GATE_UART (0x1 << 4) #define PRCM_APB0_GATE_1WIRE (0x1 << 5) #define PRCM_APB0_GATE_I2C (0x1 << 6) diff --git a/arch/arm/include/asm/arch-sunxi/rsb.h b/arch/arm/include/asm/arch-sunxi/rsb.h new file mode 100644 index 0000000..95a595a --- /dev/null +++ b/arch/arm/include/asm/arch-sunxi/rsb.h @@ -0,0 +1,55 @@ +/* + * (C) Copyright 2014 Hans de Goede <hdegoede@redhat.com> + * + * Based on allwinner u-boot sources rsb code which is: + * (C) Copyright 2007-2013 + * Allwinner Technology Co., Ltd. <www.allwinnertech.com> + * lixiang <lixiang@allwinnertech.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __SUNXI_RSB_H +#define __SUNXI_RSB_H + +#include <common.h> +#include <asm/io.h> + +struct sunxi_rsb_reg { + u32 ctrl; /* 0x00 */ + u32 ccr; /* 0x04 */ + u32 inte; /* 0x08 */ + u32 stat; /* 0x0c */ + u32 addr; /* 0x10 */ + u8 res0[8]; /* 0x14 */ + u32 data; /* 0x1c */ + u8 res1[4]; /* 0x20 */ + u32 lcr; /* 0x24 */ + u32 dmcr; /* 0x28 */ + u32 cmd; /* 0x2c */ + u32 devaddr; /* 0x30 */ +}; + +#define RSB_CTRL_SOFT_RST (1 << 0) +#define RSB_CTRL_START_TRANS (1 << 7) + +#define RSB_STAT_TOVER_INT (1 << 0) +#define RSB_STAT_TERR_INT (1 << 1) +#define RSB_STAT_LBSY_INT (1 << 2) + +#define RSB_DMCR_DEVICE_MODE_START (1 << 31) + +#define RSB_CMD_BYTE_WRITE 0x4e +#define RSB_CMD_BYTE_READ 0x8b +#define RSB_CMD_SET_RTSADDR 0xe8 + +#define RSB_DEVADDR_RUNTIME_ADDR(x) ((x) << 16) +#define RSB_DEVADDR_DEVICE_ADDR(x) ((x) << 0) + +void rsb_init(void); +int rsb_set_device_mode(u32 device_mode_data); +int rsb_set_device_address(u16 device_addr, u16 runtime_addr); +int rsb_write(const u16 runtime_device_addr, const u8 reg_addr, u8 data); +int rsb_read(const u16 runtime_device_addr, const u8 reg_addr, u8 *data); + +#endif |