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authorSimon Glass <sjg@chromium.org>2014-10-07 22:01:50 -0600
committerMinkyu Kang <mk7.kang@samsung.com>2014-10-08 17:25:47 +0900
commit311757be275c1d592ff357e9faedca4c967a3064 (patch)
tree45366e5bf7c5dc072d2b0c3e071229b1b3186ac2 /arch/arm/include/asm/arch-s5pc1xx/periph.h
parent1d5511000367e94d5edce7d9c3720bd9097912a7 (diff)
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samsung: Enable device tree for s5p_goni
Change this board to add a device tree. This also adds a pinmux header file although it is not used as yet. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch/arm/include/asm/arch-s5pc1xx/periph.h')
-rw-r--r--arch/arm/include/asm/arch-s5pc1xx/periph.h61
1 files changed, 61 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-s5pc1xx/periph.h b/arch/arm/include/asm/arch-s5pc1xx/periph.h
new file mode 100644
index 0000000..5c1c3d4
--- /dev/null
+++ b/arch/arm/include/asm/arch-s5pc1xx/periph.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ * Rajeshwari Shinde <rajeshwari.s@samsung.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __ASM_ARM_ARCH_PERIPH_H
+#define __ASM_ARM_ARCH_PERIPH_H
+
+/*
+ * Peripherals required for pinmux configuration. List will
+ * grow with support for more devices getting added.
+ * Numbering based on interrupt table.
+ *
+ */
+enum periph_id {
+ PERIPH_ID_UART0 = 51,
+ PERIPH_ID_UART1,
+ PERIPH_ID_UART2,
+ PERIPH_ID_UART3,
+ PERIPH_ID_I2C0 = 56,
+ PERIPH_ID_I2C1,
+ PERIPH_ID_I2C2,
+ PERIPH_ID_I2C3,
+ PERIPH_ID_I2C4,
+ PERIPH_ID_I2C5,
+ PERIPH_ID_I2C6,
+ PERIPH_ID_I2C7,
+ PERIPH_ID_SPI0 = 68,
+ PERIPH_ID_SPI1,
+ PERIPH_ID_SPI2,
+ PERIPH_ID_SDMMC0 = 75,
+ PERIPH_ID_SDMMC1,
+ PERIPH_ID_SDMMC2,
+ PERIPH_ID_SDMMC3,
+ PERIPH_ID_I2C8 = 87,
+ PERIPH_ID_I2C9,
+ PERIPH_ID_I2S0 = 98,
+ PERIPH_ID_I2S1 = 99,
+
+ /* Since following peripherals do
+ * not have shared peripheral interrupts (SPIs)
+ * they are numbered arbitiraly after the maximum
+ * SPIs Exynos has (128)
+ */
+ PERIPH_ID_SROMC = 128,
+ PERIPH_ID_SPI3,
+ PERIPH_ID_SPI4,
+ PERIPH_ID_SDMMC4,
+ PERIPH_ID_PWM0,
+ PERIPH_ID_PWM1,
+ PERIPH_ID_PWM2,
+ PERIPH_ID_PWM3,
+ PERIPH_ID_PWM4,
+ PERIPH_ID_I2C10 = 203,
+
+ PERIPH_ID_NONE = -1,
+};
+
+#endif /* __ASM_ARM_ARCH_PERIPH_H */