diff options
| author | SRICHARAN R <r.sricharan@ti.com> | 2012-03-12 02:25:38 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-05-15 08:31:23 +0200 |
| commit | 8de17f4617816919c4b73a3a1a377d5507596293 (patch) | |
| tree | 12028f37ec71e9211ac08471395211d037f2e669 /arch/arm/include/asm/arch-omap5 | |
| parent | f40107345cbcd6e0d1747eda45e76c4e2a6df0db (diff) | |
| download | u-boot-imx-8de17f4617816919c4b73a3a1a377d5507596293.zip u-boot-imx-8de17f4617816919c4b73a3a1a377d5507596293.tar.gz u-boot-imx-8de17f4617816919c4b73a3a1a377d5507596293.tar.bz2 | |
OMAP5: palmas: Configure nominal opp vdd values
The nominal opp vdd values as recommended for
ES1.0 silicon is set for mpu, core, mm domains using palmas.
Also used the right sequence to enable the vcores as per
a previous patch from Nishant Menon, which can be dropped now.
http://lists.denx.de/pipermail/u-boot/2012-March/119151.html
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-omap5')
| -rw-r--r-- | arch/arm/include/asm/arch-omap5/clocks.h | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/arch/arm/include/asm/arch-omap5/clocks.h b/arch/arm/include/asm/arch-omap5/clocks.h index cf6022d..f32cf3e 100644 --- a/arch/arm/include/asm/arch-omap5/clocks.h +++ b/arch/arm/include/asm/arch-omap5/clocks.h @@ -633,12 +633,17 @@ struct omap5_prcm_regs { /* SMPS */ #define SMPS_I2C_SLAVE_ADDR 0x12 -#define SMPS_REG_ADDR_VCORE1 0x55 -#define SMPS_REG_ADDR_VCORE2 0x5B -#define SMPS_REG_ADDR_VCORE3 0x61 +#define SMPS_REG_ADDR_12_MPU 0x23 +#define SMPS_REG_ADDR_45_IVA 0x2B +#define SMPS_REG_ADDR_8_CORE 0x37 -#define PHOENIX_SMPS_BASE_VOLT_STD_MODE_UV 607700 -#define PHOENIX_SMPS_BASE_VOLT_STD_MODE_WITH_OFFSET_UV 709000 +/* PALMAS VOLTAGE SETTINGS in mv for OPP_NOMINAL */ +#define VDD_MPU 1000 +#define VDD_MM 1000 +#define VDD_CORE 1040 + +/* Standard offset is 0.5v expressed in uv */ +#define PALMAS_SMPS_BASE_VOLT_UV 500000 /* TPS */ #define TPS62361_I2C_SLAVE_ADDR 0x60 @@ -700,6 +705,7 @@ extern const u32 sys_clk_array[8]; void scale_vcores(void); void do_scale_tps62361(int gpio, u32 reg, u32 volt_mv); +u32 get_offset_code(u32 offset); u32 omap_ddr_clk(void); void do_scale_vcore(u32 vcore_reg, u32 volt_mv); void setup_post_dividers(u32 *const base, const struct dpll_params *params); |