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| author | Aneesh V <aneesh@ti.com> | 2011-07-21 09:29:36 -0400 |
|---|---|---|
| committer | U-Boot <uboot@aari01-12.(none)> | 2011-08-03 12:49:20 +0200 |
| commit | b4dc6442915a202cc64fb7f0dc020e76d7d2e40d (patch) | |
| tree | 69a6b332bc949e465b7e9fdf40e620e5fb3e7935 /arch/arm/include/asm/arch-omap4 | |
| parent | d506719f7f83f501ff9c6566831a58ec2bbcc978 (diff) | |
| download | u-boot-imx-b4dc6442915a202cc64fb7f0dc020e76d7d2e40d.zip u-boot-imx-b4dc6442915a202cc64fb7f0dc020e76d7d2e40d.tar.gz u-boot-imx-b4dc6442915a202cc64fb7f0dc020e76d7d2e40d.tar.bz2 | |
omap4: clock init support for omap4460
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-omap4')
| -rw-r--r-- | arch/arm/include/asm/arch-omap4/clocks.h | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-omap4/clocks.h b/arch/arm/include/asm/arch-omap4/clocks.h index 5d9cb50..374e064 100644 --- a/arch/arm/include/asm/arch-omap4/clocks.h +++ b/arch/arm/include/asm/arch-omap4/clocks.h @@ -105,9 +105,11 @@ struct omap4_prcm_regs { u32 cm_ssc_deltamstep_dpll_ddrphy; u32 pad014[5]; u32 cm_shadow_freq_config1; + u32 pad0141[47]; + u32 cm_mpu_mpu_clkctrl; /* cm1.dsp */ - u32 pad015[103]; + u32 pad015[55]; u32 cm_dsp_clkstctrl; u32 pad016[7]; u32 cm_dsp_dsp_clkctrl; @@ -515,6 +517,8 @@ struct omap4_prcm_regs { #define CM_CLKSEL_DPLL_M_MASK (0x7FF << 8) #define CM_CLKSEL_DPLL_N_SHIFT 0 #define CM_CLKSEL_DPLL_N_MASK 0x7F +#define CM_CLKSEL_DCC_EN_SHIFT 22 +#define CM_CLKSEL_DCC_EN_MASK (1 << 22) #define OMAP4_DPLL_MAX_N 127 @@ -596,6 +600,12 @@ struct omap4_prcm_regs { /* CM_L3INIT_USBPHY_CLKCTRL */ #define USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK 8 +/* CM_MPU_MPU_CLKCTRL */ +#define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT 24 +#define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK (1 << 24) +#define MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_SHIFT 25 +#define MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_MASK (1 << 25) + /* Clock frequencies */ #define OMAP_SYS_CLK_FREQ_38_4_MHZ 38400000 #define OMAP_SYS_CLK_IND_38_4_MHZ 6 |