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author | Sricharan <r.sricharan@ti.com> | 2011-11-15 09:50:03 -0500 |
---|---|---|
committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-11-15 22:25:50 +0100 |
commit | 78f455c055ddf55a1a2dd6ae5e2d060ed2e5bd0e (patch) | |
tree | c124c8e56d72e9e46f70516fa9dd3dabdac22d9a /arch/arm/include/asm/arch-omap4 | |
parent | bb772a594493092adfb18a56889e0bce855eed99 (diff) | |
download | u-boot-imx-78f455c055ddf55a1a2dd6ae5e2d060ed2e5bd0e.zip u-boot-imx-78f455c055ddf55a1a2dd6ae5e2d060ed2e5bd0e.tar.gz u-boot-imx-78f455c055ddf55a1a2dd6ae5e2d060ed2e5bd0e.tar.bz2 |
omap4/5: Add support for booting with CH.
Configuration header(CH) is 512 byte header attached to an OMAP
boot image that will help ROM code to initialize clocks, SDRAM
etc and copy U-Boot directly into SDRAM. CH can help us in
by-passing SPL and directly boot U-boot, hence it's an alternative
for SPL. However, we intend to support both CH and SPL for OMAP4/5.
Initialization done through CH is limited and is not equivalent
to that done by SPL. So U-Boot has to distinguish between the
two cases and handle them accordingly. This patch takes care
of doing this.
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-omap4')
-rw-r--r-- | arch/arm/include/asm/arch-omap4/clocks.h | 1 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-omap4/omap.h | 16 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-omap4/sys_proto.h | 25 |
3 files changed, 34 insertions, 8 deletions
diff --git a/arch/arm/include/asm/arch-omap4/clocks.h b/arch/arm/include/asm/arch-omap4/clocks.h index ba52574..c2a9b46 100644 --- a/arch/arm/include/asm/arch-omap4/clocks.h +++ b/arch/arm/include/asm/arch-omap4/clocks.h @@ -698,6 +698,7 @@ void setup_sri2c(void); void setup_post_dividers(u32 *const base, const struct dpll_params *params); u32 get_sys_clk_index(void); void enable_basic_clocks(void); +void enable_basic_uboot_clocks(void); void enable_non_essential_clocks(void); void do_enable_clocks(u32 *const *clk_domains, u32 *const *clk_modules_hw_auto, diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h index 0ade896..e994257 100644 --- a/arch/arm/include/asm/arch-omap4/omap.h +++ b/arch/arm/include/asm/arch-omap4/omap.h @@ -191,5 +191,21 @@ struct control_lpddr2io_regs { #define DEV_DESC_PTR_OFFSET 0x4 #define DEV_DATA_PTR_OFFSET 0x18 #define BOOT_MODE_OFFSET 0x8 +#define RESET_REASON_OFFSET 0x9 +#define CH_FLAGS_OFFSET 0xA +#define CH_FLAGS_CHSETTINGS (0x1 << 0) +#define CH_FLAGS_CHRAM (0x1 << 1) +#define CH_FLAGS_CHFLASH (0x1 << 2) +#define CH_FLAGS_CHMMCSD (0x1 << 3) + +#ifndef __ASSEMBLY__ +struct omap_boot_parameters { + char *boot_message; + unsigned int mem_boot_descriptor; + unsigned char omap_bootdevice; + unsigned char reset_reason; + unsigned char ch_flags; +}; +#endif #endif diff --git a/arch/arm/include/asm/arch-omap4/sys_proto.h b/arch/arm/include/asm/arch-omap4/sys_proto.h index b8113e1..4146e21 100644 --- a/arch/arm/include/asm/arch-omap4/sys_proto.h +++ b/arch/arm/include/asm/arch-omap4/sys_proto.h @@ -55,6 +55,13 @@ u32 omap_sdram_size(void); u32 cortex_rev(void); void init_omap_revision(void); void do_io_settings(void); +/* + * This is used to verify if the configuration header + * was executed by Romcode prior to control of transfer + * to the bootloader. SPL is responsible for saving and + * passing this to the u-boot. + */ +extern struct omap_boot_parameters boot_params; static inline u32 running_from_sdram(void) { @@ -67,15 +74,17 @@ static inline u32 running_from_sdram(void) static inline u8 uboot_loaded_by_spl(void) { /* - * Configuration Header is not supported yet, so u-boot init running - * from SDRAM implies that it was loaded by SPL. When this situation - * changes one of these approaches could be taken: - * i. Pass a magic from SPL to U-Boot and U-Boot save it at a known - * location. - * ii. Check the OPP. CH can support only 50% OPP while SPL initializes - * the DPLLs at 100% OPP. + * u-boot can be running from sdram either because of configuration + * Header or by SPL. If because of CH, then the romcode sets the + * CHSETTINGS executed bit to true in the boot parameter structure that + * it passes to the bootloader.This parameter is stored in the ch_flags + * variable by both SPL and u-boot.Check out for CHSETTINGS, which is a + * mandatory section if CH is present. */ - return running_from_sdram(); + if ((boot_params.ch_flags) & (CH_FLAGS_CHSETTINGS)) + return 0; + else + return running_from_sdram(); } /* * The basic hardware init of OMAP(s_init()) can happen in 4 |