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| author | Ye.Li <B37916@freescale.com> | 2014-06-11 15:34:49 +0800 |
|---|---|---|
| committer | Ye.Li <B37916@freescale.com> | 2014-06-17 11:13:56 +0800 |
| commit | df6ac8531d498021ed379c74fc1847bd2cec7179 (patch) | |
| tree | efd3359d0a360b109f1ba2a28c36c90b31f96cd4 /arch/arm/include/asm/arch-mx6 | |
| parent | 7b804c3041690acc1d1242ec3f109c82a77ed9da (diff) | |
| download | u-boot-imx-df6ac8531d498021ed379c74fc1847bd2cec7179.zip u-boot-imx-df6ac8531d498021ed379c74fc1847bd2cec7179.tar.gz u-boot-imx-df6ac8531d498021ed379c74fc1847bd2cec7179.tar.bz2 | |
ENGR00315894-55 iMX6SX: add debug monitor support
Debug monitor will print out last failed AXI access info when
system reboot is caused by AXI access failure, only works when
debug monitor is enabled.
Enable this module on i.MX6SX.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
Diffstat (limited to 'arch/arm/include/asm/arch-mx6')
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/imx-regs.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 30b750e..9532e5e 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -255,7 +255,11 @@ #define CSU_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x40000) #define IP2APB_PERFMON1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x44000) #define IP2APB_PERFMON2_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x48000) +#ifdef CONFIG_MX6SX +#define DEBUG_MONITOR_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x4C000) +#else #define IP2APB_PERFMON3_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x4C000) +#endif #define IP2APB_TZASC1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x50000) #ifdef CONFIG_MX6SX #define SAI1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x54000) @@ -808,6 +812,19 @@ struct wdog_regs { u16 wmcr; /* Miscellaneous Control */ }; +struct dbg_monitor_regs { + u32 ctrl[4]; /* Control */ + u32 master_en[4]; /* Master enable */ + u32 irq[4]; /* IRQ */ + u32 trap_addr_low[4]; /* Trap address low */ + u32 trap_addr_high[4]; /* Trap address high */ + u32 trap_id[4]; /* Trap ID */ + u32 snvs_addr[4]; /* SNVS address */ + u32 snvs_data[4]; /* SNVS data */ + u32 snvs_info[4]; /* SNVS info */ + u32 version[4]; /* Version */ +}; + extern void check_cpu_temperature(void); /* If ROM fail back to USB recover mode, USBPH0_PWD will be clear to use USB |