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| author | David Jander <david@protonic.nl> | 2011-07-13 21:11:53 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-09-04 11:36:11 +0200 |
| commit | 9db1bfa110ac411ab3468e817f7f74b2439eb8c8 (patch) | |
| tree | c9fd5e7dc463937e8642e410c644ebdf067dfbe3 /arch/arm/include/asm/arch-mx5 | |
| parent | 96c9745fa1f03a0e24d09a32344a1f0c821bc9af (diff) | |
| download | u-boot-imx-9db1bfa110ac411ab3468e817f7f74b2439eb8c8.zip u-boot-imx-9db1bfa110ac411ab3468e817f7f74b2439eb8c8.tar.gz u-boot-imx-9db1bfa110ac411ab3468e817f7f74b2439eb8c8.tar.bz2 | |
ARM: MX51: PLL errata workaround
This is a port of the official PLL errata workaround from Freescale to
mainline u-boot.
The PLL's in the i.MX51 processor can go out of lock due to a metastable
condition in an analog flip-flop when used at high frequencies.
This workaround implements an undocumented feature in the PLL (dither
mode), which causes the effect of this failure to be much lower (in terms
of frequency deviation), avoiding system failure, or at least decreasing
the likelihood of system failure.
Signed-off-by: David Jander <david@protonic.nl>
Diffstat (limited to 'arch/arm/include/asm/arch-mx5')
| -rw-r--r-- | arch/arm/include/asm/arch-mx5/imx-regs.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h index e83ca29..fb2c66f 100644 --- a/arch/arm/include/asm/arch-mx5/imx-regs.h +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h @@ -235,6 +235,11 @@ /* Assuming 24MHz input clock with doubler ON */ /* MFI PDF */ +#define DP_OP_864 ((8 << 4) + ((1 - 1) << 0)) +#define DP_MFD_864 (180 - 1) /* PL Dither mode */ +#define DP_MFN_864 180 +#define DP_MFN_800_DIT 60 /* PL Dither mode */ + #define DP_OP_850 ((8 << 4) + ((1 - 1) << 0)) #define DP_MFD_850 (48 - 1) #define DP_MFN_850 41 |