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author | Benoît Thébaudeau <benoit.thebaudeau@advansee.com> | 2012-09-27 10:22:37 +0000 |
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committer | Tom Rini <trini@ti.com> | 2012-10-15 11:54:11 -0700 |
commit | b94792982f8f5d584f4c032117ecbc8abcec977f (patch) | |
tree | 379055bc5fc510e5b8bf4ffa3f9598f53d413d0b /arch/arm/include/asm/arch-mx5/crm_regs.h | |
parent | 649dc8abd9be85f6de441c3d4d2b7e0588156a38 (diff) | |
download | u-boot-imx-b94792982f8f5d584f4c032117ecbc8abcec977f.zip u-boot-imx-b94792982f8f5d584f4c032117ecbc8abcec977f.tar.gz u-boot-imx-b94792982f8f5d584f4c032117ecbc8abcec977f.tar.bz2 |
mx5 clocks: Fix get_lp_apm()
If CCM.CCSR.lp_apm is set, the lp_apm clock is not necessarily 32768 Hz x 1024.
In that case:
- on i.MX51, this clock comes from the output of the FPM,
- on i.MX53, this clock comes from the output of PLL4.
This patch fixes the code accordingly.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/include/asm/arch-mx5/crm_regs.h')
-rw-r--r-- | arch/arm/include/asm/arch-mx5/crm_regs.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx5/crm_regs.h b/arch/arm/include/asm/arch-mx5/crm_regs.h index 56dceb4..ddfab70 100644 --- a/arch/arm/include/asm/arch-mx5/crm_regs.h +++ b/arch/arm/include/asm/arch-mx5/crm_regs.h @@ -82,6 +82,21 @@ struct mxc_ccm_reg { u32 cmeor; }; +/* Define the bits in register CCR */ +#define MXC_CCM_CCR_COSC_EN (0x1 << 12) +#if defined(CONFIG_MX51) +#define MXC_CCM_CCR_FPM_MULT (0x1 << 11) +#endif +#define MXC_CCM_CCR_CAMP2_EN (0x1 << 10) +#define MXC_CCM_CCR_CAMP1_EN (0x1 << 9) +#if defined(CONFIG_MX51) +#define MXC_CCM_CCR_FPM_EN (0x1 << 8) +#endif +#define MXC_CCM_CCR_OSCNT_OFFSET 0 +#define MXC_CCM_CCR_OSCNT_MASK 0xFF +#define MXC_CCM_CCR_OSCNT(v) ((v) & 0xFF) +#define MXC_CCM_CCR_OSCNT_RD(r) ((r) & 0xFF) + /* Define the bits in register CCSR */ #if defined(CONFIG_MX51) #define MXC_CCM_CCSR_LP_APM (0x1 << 9) |