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authorBenoît Thébaudeau <benoit.thebaudeau@advansee.com>2012-11-13 09:57:59 +0000
committerStefano Babic <sbabic@denx.de>2012-11-16 09:16:45 +0100
commit34d33b671a03da1c115d83a603fb36da0360b20a (patch)
treeb55eb27eb9fae07183e532b3f53a7af2870f3c49 /arch/arm/include/asm/arch-mx31
parent9fa3d093d626b25c64c695e29d381dd2ae7bf8cc (diff)
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ehci-mxc: Define host offsets
Some MXC SoCs like the i.MX35 have hosts located at unusual offsets, so prepare to the introduction of i.MX35 support by defining the ehci-mxc hosts offsets at SoC level. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/include/asm/arch-mx31')
-rw-r--r--arch/arm/include/asm/arch-mx31/imx-regs.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 01a849d..ae3658b 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -895,6 +895,7 @@ struct esdc_regs {
#define MX31_AIPS1_BASE_ADDR 0x43f00000
#define IMX_USB_BASE (MX31_AIPS1_BASE_ADDR + 0x88000)
+#define IMX_USB_PORT_OFFSET 0x200
/*
* CSPI register definitions