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authorPeng Fan <Peng.Fan@freescale.com>2015-03-14 17:37:55 +0800
committerPeng Fan <Peng.Fan@freescale.com>2015-04-29 14:40:29 +0800
commitc020a931227fe05a2a43a34d5554fd31703b8cd9 (patch)
tree109dfe439c4ea6dcfca8aeb252aee9f9afd17378 /arch/arm/include/asm/arch-lpc32xx
parent420626272a5fb4975ebbd7ec357e574cb2b073c6 (diff)
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MLK-10774-3 iMX6SX/SL: Modify SOC to support two ENET
iMX6SX has different enet system clocks with iMX6SL, and has two ENET controllers. So update clocks and soc APIs accordingly to support this features. 1. Enet RGMII TX clock source may come from external or internal PLL. By default, use the external phy CLK_25M output as TX clock source. When using internal PLL as source, the function enable_fec_anatop_clock must be called to enable clock for each enet controller. 2. Modify the MAC address function "imx_get_mac_from_fuse" to get either ENET MAC address. 3. Add configuration "CONFIG_FEC_MXC_25M_REF_CLK" to enable ENET 25Mhz reference clock. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Diffstat (limited to 'arch/arm/include/asm/arch-lpc32xx')
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