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author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2016-12-09 16:09:00 +0800 |
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committer | York Sun <york.sun@nxp.com> | 2017-01-18 09:29:08 -0800 |
commit | 031acdbae89515371f794d01df819b490ff7ca9c (patch) | |
tree | 6ce8549630686f35299191fe944d0b7d8e18e238 /arch/arm/include/asm/arch-fsl-layerscape/soc.h | |
parent | 6424577b1bf1c7872baea42de174bc461de74b6b (diff) | |
download | u-boot-imx-031acdbae89515371f794d01df819b490ff7ca9c.zip u-boot-imx-031acdbae89515371f794d01df819b490ff7ca9c.tar.gz u-boot-imx-031acdbae89515371f794d01df819b490ff7ca9c.tar.bz2 |
armv8/fsl_lsch2: Add chip power supply voltage setup
Set up chip power supply voltage according to voltage ID.
The fuse status register provides the values from on-chip
voltage ID fuses programmed at the factory. These values
define the voltage requirements for the chip.
Main operations:
1. Set up the core voltage
2. Set up the SERDES voltage and reset SERDES lanes
3. Enable/disable DDR controller support 0.9V if needed
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/include/asm/arch-fsl-layerscape/soc.h')
-rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/soc.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index 78363b6..9bafa6d 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -99,6 +99,9 @@ struct ccsr_ahci { void fsl_lsch3_early_init_f(void); #elif defined(CONFIG_FSL_LSCH2) void fsl_lsch2_early_init_f(void); +int setup_chip_volt(void); +/* Setup core vdd in unit mV */ +int board_setup_core_volt(u32 vdd); #endif void cpu_name(char *name); |