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author | Rajeshwari Shinde <rajeshwari.s@samsung.com> | 2012-05-21 16:38:03 +0530 |
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committer | Marek Vasut <marex@denx.de> | 2012-07-09 18:27:54 +0200 |
commit | 7590d3cece3a4152bc60d6f1ca84b09f7abbf3cf (patch) | |
tree | f93a3d8f252a7ea697a50b2ea1437cfca97ab748 /arch/arm/include/asm/arch-exynos/ehci.h | |
parent | 58e22f8a15adec39d24d060180d76a4cbe86a04b (diff) | |
download | u-boot-imx-7590d3cece3a4152bc60d6f1ca84b09f7abbf3cf.zip u-boot-imx-7590d3cece3a4152bc60d6f1ca84b09f7abbf3cf.tar.gz u-boot-imx-7590d3cece3a4152bc60d6f1ca84b09f7abbf3cf.tar.bz2 |
USB: EXYNOS: Incorporate EHCI review comments
This patch incorates the review comments given by Minkyu Kang for
EHCI support on EXYNOS
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Diffstat (limited to 'arch/arm/include/asm/arch-exynos/ehci.h')
-rw-r--r-- | arch/arm/include/asm/arch-exynos/ehci.h | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-exynos/ehci.h b/arch/arm/include/asm/arch-exynos/ehci.h new file mode 100644 index 0000000..8aeff8a --- /dev/null +++ b/arch/arm/include/asm/arch-exynos/ehci.h @@ -0,0 +1,66 @@ +/* + * SAMSUNG EXYNOS USB HOST EHCI Controller + * + * Copyright (C) 2012 Samsung Electronics Co.Ltd + * Vivek Gautam <gautam.vivek@samsung.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef __ASM_ARM_ARCH_EHCI_H__ +#define __ASM_ARM_ARCH_EHCI_H__ + +#define CLK_24MHZ 5 + +#define HOST_CTRL0_PHYSWRSTALL (1 << 31) +#define HOST_CTRL0_COMMONON_N (1 << 9) +#define HOST_CTRL0_SIDDQ (1 << 6) +#define HOST_CTRL0_FORCESLEEP (1 << 5) +#define HOST_CTRL0_FORCESUSPEND (1 << 4) +#define HOST_CTRL0_WORDINTERFACE (1 << 3) +#define HOST_CTRL0_UTMISWRST (1 << 2) +#define HOST_CTRL0_LINKSWRST (1 << 1) +#define HOST_CTRL0_PHYSWRST (1 << 0) + +#define HOST_CTRL0_FSEL_MASK (7 << 16) + +#define EHCICTRL_ENAINCRXALIGN (1 << 29) +#define EHCICTRL_ENAINCR4 (1 << 28) +#define EHCICTRL_ENAINCR8 (1 << 27) +#define EHCICTRL_ENAINCR16 (1 << 26) + +/* Register map for PHY control */ +struct exynos_usb_phy { + unsigned int usbphyctrl0; + unsigned int usbphytune0; + unsigned int reserved1[2]; + unsigned int hsicphyctrl1; + unsigned int hsicphytune1; + unsigned int reserved2[2]; + unsigned int hsicphyctrl2; + unsigned int hsicphytune2; + unsigned int reserved3[2]; + unsigned int ehcictrl; + unsigned int ohcictrl; + unsigned int usbotgsys; + unsigned int reserved4; + unsigned int usbotgtune; +}; + +/* Switch on the VBUS power. */ +int board_usb_vbus_init(void); + +#endif /* __ASM_ARM_ARCH_EHCI_H__ */ |