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author | Sudhakar Rajashekhara <sudhakar.raj@ti.com> | 2011-09-03 22:18:04 -0400 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-09-04 11:36:18 +0200 |
commit | b7e6843f970a87941d45d4c8a9c41fa9d406e891 (patch) | |
tree | 88b3a9abb673ed862312830150ade1bd59ee2ba1 /arch/arm/include/asm/arch-davinci | |
parent | bd65d006a6088bcb857e079447d7549e2cd7054d (diff) | |
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da8xx: add support for multiple PLL controllers
Modify clk_get() function in cpu file to work for
multiple PLL controllers.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-davinci')
-rw-r--r-- | arch/arm/include/asm/arch-davinci/hardware.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index f537c4b..646e2ce 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -129,6 +129,7 @@ typedef volatile unsigned int * dv_reg_p; #define DAVINCI_TIMER1_BASE 0x01c21000 #define DAVINCI_WDOG_BASE 0x01c21000 #define DAVINCI_PLL_CNTRL0_BASE 0x01c11000 +#define DAVINCI_PLL_CNTRL1_BASE 0x01e1a000 #define DAVINCI_PSC0_BASE 0x01c10000 #define DAVINCI_PSC1_BASE 0x01e27000 #define DAVINCI_SPI0_BASE 0x01c41000 @@ -387,7 +388,8 @@ struct davinci_pllc_regs { dv_reg emucnt1; }; -#define davinci_pllc_regs ((struct davinci_pllc_regs *)DAVINCI_PLL_CNTRL0_BASE) +#define davinci_pllc0_regs ((struct davinci_pllc_regs *)DAVINCI_PLL_CNTRL0_BASE) +#define davinci_pllc1_regs ((struct davinci_pllc_regs *)DAVINCI_PLL_CNTRL1_BASE) #define DAVINCI_PLLC_DIV_MASK 0x1f #define ASYNC3 get_async3_src() |