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authorHeiko Schocher <hs@denx.de>2012-01-14 21:43:04 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-02-12 10:11:23 +0100
commit2627c8c0a1bc64099cf6b6e2d978d666f88ef08d (patch)
tree6edb82af59864f5f5a86a0b5c896807550806454 /arch/arm/include/asm/arch-davinci
parent3f84108b9946fa0d3bd7e9d7c17dda2da6c8216c (diff)
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arm, davinci: add timer defines for tcr field
Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com>
Diffstat (limited to 'arch/arm/include/asm/arch-davinci')
-rw-r--r--arch/arm/include/asm/arch-davinci/timer_defs.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-davinci/timer_defs.h b/arch/arm/include/asm/arch-davinci/timer_defs.h
index 49b9e24..914ae07 100644
--- a/arch/arm/include/asm/arch-davinci/timer_defs.h
+++ b/arch/arm/include/asm/arch-davinci/timer_defs.h
@@ -37,6 +37,19 @@ struct davinci_timer {
u_int32_t wdtcr;
};
+#define DV_TIMER_TCR_ENAMODE_MASK 3
+
+#define DV_TIMER_TCR_ENAMODE12_SHIFT 6
+#define DV_TIMER_TCR_CLKSRC12_SHIFT 8
+#define DV_TIMER_TCR_READRSTMODE12_SHIFT 10
+#define DV_TIMER_TCR_CAPMODE12_SHIFT 11
+#define DV_TIMER_TCR_CAPVTMODE12_SHIFT 12
+#define DV_TIMER_TCR_ENAMODE34_SHIFT 22
+#define DV_TIMER_TCR_CLKSRC34_SHIFT 24
+#define DV_TIMER_TCR_READRSTMODE34_SHIFT 26
+#define DV_TIMER_TCR_CAPMODE34_SHIFT 27
+#define DV_TIMER_TCR_CAPEVTMODE12_SHIFT 28
+
#define DV_WDT_ENABLE_SYS_RESET 0x00020000
#define DV_WDT_TRIGGER_SYS_RESET 0x00020002