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author | Tom Rini <trini@ti.com> | 2013-10-08 09:51:48 -0400 |
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committer | Tom Rini <trini@ti.com> | 2013-10-08 09:51:48 -0400 |
commit | 9f3fe6da27e2328285aa37149fce845da4e57560 (patch) | |
tree | 26fdeff18bd1c7bddc7fadb969a4c12ad9bc863c /arch/arm/include/asm/arch-am33xx/ddr_defs.h | |
parent | 968294bd7b9b540f53c1fb3c809da464623a4362 (diff) | |
parent | 572886af5984febafa6f083e6b8af0465f4f5764 (diff) | |
download | u-boot-imx-9f3fe6da27e2328285aa37149fce845da4e57560.zip u-boot-imx-9f3fe6da27e2328285aa37149fce845da4e57560.tar.gz u-boot-imx-9f3fe6da27e2328285aa37149fce845da4e57560.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'arch/arm/include/asm/arch-am33xx/ddr_defs.h')
-rw-r--r-- | arch/arm/include/asm/arch-am33xx/ddr_defs.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h b/arch/arm/include/asm/arch-am33xx/ddr_defs.h index 95f7a9a..fe48b5f 100644 --- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h +++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h @@ -110,20 +110,20 @@ #define MT41J512M8RH125_IOCTRL_VALUE 0x18B /* Samsung K4B2G1646E-BIH9 */ -#define K4B2G1646EBIH9_EMIF_READ_LATENCY 0x06 -#define K4B2G1646EBIH9_EMIF_TIM1 0x0888A39B -#define K4B2G1646EBIH9_EMIF_TIM2 0x2A04011A -#define K4B2G1646EBIH9_EMIF_TIM3 0x501F820F -#define K4B2G1646EBIH9_EMIF_SDCFG 0x61C24AB2 -#define K4B2G1646EBIH9_EMIF_SDREF 0x0000093B +#define K4B2G1646EBIH9_EMIF_READ_LATENCY 0x07 +#define K4B2G1646EBIH9_EMIF_TIM1 0x0AAAE51B +#define K4B2G1646EBIH9_EMIF_TIM2 0x2A1D7FDA +#define K4B2G1646EBIH9_EMIF_TIM3 0x501F83FF +#define K4B2G1646EBIH9_EMIF_SDCFG 0x61C052B2 +#define K4B2G1646EBIH9_EMIF_SDREF 0x00000C30 #define K4B2G1646EBIH9_ZQ_CFG 0x50074BE4 #define K4B2G1646EBIH9_DLL_LOCK_DIFF 0x1 -#define K4B2G1646EBIH9_RATIO 0x40 -#define K4B2G1646EBIH9_INVERT_CLKOUT 0x1 -#define K4B2G1646EBIH9_RD_DQS 0x3B -#define K4B2G1646EBIH9_WR_DQS 0x85 -#define K4B2G1646EBIH9_PHY_FIFO_WE 0x100 -#define K4B2G1646EBIH9_PHY_WR_DATA 0xC1 +#define K4B2G1646EBIH9_RATIO 0x80 +#define K4B2G1646EBIH9_INVERT_CLKOUT 0x0 +#define K4B2G1646EBIH9_RD_DQS 0x35 +#define K4B2G1646EBIH9_WR_DQS 0x3A +#define K4B2G1646EBIH9_PHY_FIFO_WE 0x97 +#define K4B2G1646EBIH9_PHY_WR_DATA 0x76 #define K4B2G1646EBIH9_IOCTRL_VALUE 0x18B /** |