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author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-05-11 09:25:36 +0200 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-05-11 09:25:36 +0200 |
commit | ec7023db8dc95966919589541f1ca09355a3f7a5 (patch) | |
tree | 69be08a0b3f19e3e1d99ea7829931f8f800a01d9 /arch/arm/imx-common | |
parent | e825b100d209a9d3c79b2998452cafa94eec986a (diff) | |
parent | d782c1fe7246301143ed78c0d86ea6c81f9325f9 (diff) | |
download | u-boot-imx-ec7023db8dc95966919589541f1ca09355a3f7a5.zip u-boot-imx-ec7023db8dc95966919589541f1ca09355a3f7a5.tar.gz u-boot-imx-ec7023db8dc95966919589541f1ca09355a3f7a5.tar.bz2 |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Conflicts:
drivers/mtd/nand/mxc_nand_spl.c
include/configs/m28evk.h
Diffstat (limited to 'arch/arm/imx-common')
-rw-r--r-- | arch/arm/imx-common/Makefile | 22 | ||||
-rw-r--r-- | arch/arm/imx-common/iomux-v3.c | 18 | ||||
-rw-r--r-- | arch/arm/imx-common/misc.c | 84 |
3 files changed, 106 insertions, 18 deletions
diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile index 44b6822..8bba8a5 100644 --- a/arch/arm/imx-common/Makefile +++ b/arch/arm/imx-common/Makefile @@ -27,10 +27,16 @@ include $(TOPDIR)/config.mk LIB = $(obj)libimx-common.o +ifeq ($(SOC),$(filter $(SOC),mx25 mx35 mx5 mx6)) +COBJS-y = iomux-v3.o +endif ifeq ($(SOC),$(filter $(SOC),mx5 mx6)) -COBJS-y = iomux-v3.o timer.o cpu.o speed.o +COBJS-y += timer.o cpu.o speed.o COBJS-$(CONFIG_I2C_MXC) += i2c-mxv7.o endif +ifeq ($(SOC),$(filter $(SOC),mx6 mxs)) +COBJS-y += misc.o +endif COBJS-$(CONFIG_CMD_BMODE) += cmd_bmode.o COBJS-$(CONFIG_CMD_HDMIDETECT) += cmd_hdmidet.o COBJS := $(sort $(COBJS-y)) @@ -58,8 +64,11 @@ $(OBJTREE)/SPL: $(OBJTREE)/spl/u-boot-spl.bin $(OBJTREE)/$(patsubst "%",%,$(CONF $(OBJTREE)/u-boot-with-spl.imx: $(OBJTREE)/SPL $(OBJTREE)/u-boot.bin $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) \ -I binary -O binary $< $(OBJTREE)/spl/u-boot-spl-pad.imx - cat $(OBJTREE)/spl/u-boot-spl-pad.imx $(OBJTREE)/u-boot.bin > $@ - rm $(OBJTREE)/spl/u-boot-spl-pad.imx + $(OBJTREE)/tools/mkimage -A arm -O U-Boot -a $(CONFIG_SYS_TEXT_BASE) \ + -e $(CONFIG_SYS_TEXT_BASE) -C none -d $(OBJTREE)/u-boot.bin \ + $(OBJTREE)/u-boot.uim + cat $(OBJTREE)/spl/u-boot-spl-pad.imx $(OBJTREE)/u-boot.uim > $@ + rm $(OBJTREE)/spl/u-boot-spl-pad.imx $(OBJTREE)/u-boot.uim $(OBJTREE)/u-boot-with-nand-spl.imx: $(OBJTREE)/SPL $(OBJTREE)/u-boot.bin (echo -ne '\x00\x00\x00\x00\x46\x43\x42\x20\x01' && \ @@ -69,8 +78,11 @@ $(OBJTREE)/u-boot-with-nand-spl.imx: $(OBJTREE)/SPL $(OBJTREE)/u-boot.bin -I binary -O binary $(OBJTREE)/spl/u-boot-nand-spl.imx \ $(OBJTREE)/spl/u-boot-nand-spl-pad.imx rm $(OBJTREE)/spl/u-boot-nand-spl.imx - cat $(OBJTREE)/spl/u-boot-nand-spl-pad.imx $(OBJTREE)/u-boot.bin > $@ - rm $(OBJTREE)/spl/u-boot-nand-spl-pad.imx + $(OBJTREE)/tools/mkimage -A arm -O U-Boot -a $(CONFIG_SYS_TEXT_BASE) \ + -e $(CONFIG_SYS_TEXT_BASE) -C none -d $(OBJTREE)/u-boot.bin \ + $(OBJTREE)/u-boot.uim + cat $(OBJTREE)/spl/u-boot-nand-spl-pad.imx $(OBJTREE)/u-boot.uim > $@ + rm $(OBJTREE)/spl/u-boot-nand-spl-pad.imx $(OBJTREE)/u-boot.uim ######################################################################### diff --git a/arch/arm/imx-common/iomux-v3.c b/arch/arm/imx-common/iomux-v3.c index 08fad78..7fe5ce7 100644 --- a/arch/arm/imx-common/iomux-v3.c +++ b/arch/arm/imx-common/iomux-v3.c @@ -30,7 +30,7 @@ static void *base = (void *)IOMUXC_BASE_ADDR; /* * configures a single pad in the iomuxer */ -int imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad) +void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad) { u32 mux_ctrl_ofs = (pad & MUX_CTRL_OFS_MASK) >> MUX_CTRL_OFS_SHIFT; u32 mux_mode = (pad & MUX_MODE_MASK) >> MUX_MODE_SHIFT; @@ -50,22 +50,14 @@ int imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad) if (!(pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs) __raw_writel(pad_ctrl, base + pad_ctrl_ofs); - - return 0; } -int imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list, - unsigned count) +void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list, + unsigned count) { iomux_v3_cfg_t const *p = pad_list; int i; - int ret; - for (i = 0; i < count; i++) { - ret = imx_iomux_v3_setup_pad(*p); - if (ret) - return ret; - p++; - } - return 0; + for (i = 0; i < count; i++) + imx_iomux_v3_setup_pad(*p++); } diff --git a/arch/arm/imx-common/misc.c b/arch/arm/imx-common/misc.c new file mode 100644 index 0000000..220785c --- /dev/null +++ b/arch/arm/imx-common/misc.c @@ -0,0 +1,84 @@ +/* + * Copyright 2013 Stefan Roese <sr@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <common.h> +#include <asm/errno.h> +#include <asm/io.h> +#include <asm/imx-common/regs-common.h> + +/* 1 second delay should be plenty of time for block reset. */ +#define RESET_MAX_TIMEOUT 1000000 + +#define MXS_BLOCK_SFTRST (1 << 31) +#define MXS_BLOCK_CLKGATE (1 << 30) + +int mxs_wait_mask_set(struct mxs_register_32 *reg, uint32_t mask, unsigned + int timeout) +{ + while (--timeout) { + if ((readl(®->reg) & mask) == mask) + break; + udelay(1); + } + + return !timeout; +} + +int mxs_wait_mask_clr(struct mxs_register_32 *reg, uint32_t mask, unsigned + int timeout) +{ + while (--timeout) { + if ((readl(®->reg) & mask) == 0) + break; + udelay(1); + } + + return !timeout; +} + +int mxs_reset_block(struct mxs_register_32 *reg) +{ + /* Clear SFTRST */ + writel(MXS_BLOCK_SFTRST, ®->reg_clr); + + if (mxs_wait_mask_clr(reg, MXS_BLOCK_SFTRST, RESET_MAX_TIMEOUT)) + return 1; + + /* Clear CLKGATE */ + writel(MXS_BLOCK_CLKGATE, ®->reg_clr); + + /* Set SFTRST */ + writel(MXS_BLOCK_SFTRST, ®->reg_set); + + /* Wait for CLKGATE being set */ + if (mxs_wait_mask_set(reg, MXS_BLOCK_CLKGATE, RESET_MAX_TIMEOUT)) + return 1; + + /* Clear SFTRST */ + writel(MXS_BLOCK_SFTRST, ®->reg_clr); + + if (mxs_wait_mask_clr(reg, MXS_BLOCK_SFTRST, RESET_MAX_TIMEOUT)) + return 1; + + /* Clear CLKGATE */ + writel(MXS_BLOCK_CLKGATE, ®->reg_clr); + + if (mxs_wait_mask_clr(reg, MXS_BLOCK_CLKGATE, RESET_MAX_TIMEOUT)) + return 1; + + return 0; +} |