summaryrefslogtreecommitdiff
path: root/arch/arm/dts
diff options
context:
space:
mode:
authorTom Rini <trini@ti.com>2014-12-16 09:41:00 -0500
committerTom Rini <trini@ti.com>2014-12-16 09:41:00 -0500
commit3bfbf32b6fe5e2d4605bc7ee99d1844b572662c2 (patch)
tree6d13141b70a8961bc6ff67cec8a9c6e167d96bfb /arch/arm/dts
parentb9206e61f3d87535ac4f4b0b858e674fd1edfeaf (diff)
parent065496d1b5304a6a67b366b613c3504aab2e2dbd (diff)
downloadu-boot-imx-3bfbf32b6fe5e2d4605bc7ee99d1844b572662c2.zip
u-boot-imx-3bfbf32b6fe5e2d4605bc7ee99d1844b572662c2.tar.gz
u-boot-imx-3bfbf32b6fe5e2d4605bc7ee99d1844b572662c2.tar.bz2
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Diffstat (limited to 'arch/arm/dts')
-rw-r--r--arch/arm/dts/socfpga.dtsi56
-rw-r--r--arch/arm/dts/socfpga_cyclone5.dtsi13
-rw-r--r--arch/arm/dts/socfpga_cyclone5_socrates.dts39
3 files changed, 72 insertions, 36 deletions
diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
index 4472fd9..969e5ad 100644
--- a/arch/arm/dts/socfpga.dtsi
+++ b/arch/arm/dts/socfpga.dtsi
@@ -1,18 +1,7 @@
/*
* Copyright (C) 2012 Altera <www.altera.com>
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include "skeleton.dtsi"
@@ -639,6 +628,49 @@
clock-names = "biu", "ciu";
};
+ qspi: spi@ff705000 {
+ compatible = "cadence,qspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xff705000 0x1000>,
+ <0xffa00000 0x1000>;
+ interrupts = <0 151 4>;
+ clocks = <&qspi_clk>;
+ ext-decoder = <0>; /* external decoder */
+ num-chipselect = <4>;
+ fifo-depth = <128>;
+ bus-num = <2>;
+ status = "disabled";
+ };
+
+ spi0: spi@fff00000 {
+ compatible = "snps,dw-spi-mmio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xfff00000 0x1000>;
+ interrupts = <0 154 4>;
+ num-chipselect = <4>;
+ bus-num = <0>;
+ tx-dma-channel = <&pdma 16>;
+ rx-dma-channel = <&pdma 17>;
+ clocks = <&per_base_clk>;
+ status = "disabled";
+ };
+
+ spi1: spi@fff01000 {
+ compatible = "snps,dw-spi-mmio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xfff01000 0x1000>;
+ interrupts = <0 156 4>;
+ num-chipselect = <4>;
+ bus-num = <1>;
+ tx-dma-channel = <&pdma 20>;
+ rx-dma-channel = <&pdma 21>;
+ clocks = <&per_base_clk>;
+ status = "disabled";
+ };
+
/* Local timer */
timer@fffec600 {
compatible = "arm,cortex-a9-twd-timer";
diff --git a/arch/arm/dts/socfpga_cyclone5.dtsi b/arch/arm/dts/socfpga_cyclone5.dtsi
index 28c05e7..234a901 100644
--- a/arch/arm/dts/socfpga_cyclone5.dtsi
+++ b/arch/arm/dts/socfpga_cyclone5.dtsi
@@ -1,18 +1,7 @@
/*
* Copyright (C) 2012 Altera Corporation <www.altera.com>
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ * SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts
index a1814b4..ea30483 100644
--- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
+++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts
@@ -1,18 +1,7 @@
/*
* Copyright (C) 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de>
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include "socfpga_cyclone5.dtsi"
@@ -25,6 +14,12 @@
bootargs = "console=ttyS0,115200";
};
+ aliases {
+ spi0 = "/spi@ff705000"; /* QSPI */
+ spi1 = "/spi@fff00000";
+ spi2 = "/spi@fff01000";
+ };
+
memory {
name = "memory";
device_type = "memory";
@@ -48,3 +43,23 @@
&mmc {
status = "okay";
};
+
+&qspi {
+ status = "okay";
+
+ flash0: n25q00@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "n25q00";
+ reg = <0>; /* chip select */
+ spi-max-frequency = <50000000>;
+ m25p,fast-read;
+ page-size = <256>;
+ block-size = <16>; /* 2^16, 64KB */
+ read-delay = <4>; /* delay value in read data capture register */
+ tshsl-ns = <50>;
+ tsd2d-ns = <50>;
+ tchsh-ns = <4>;
+ tslch-ns = <4>;
+ };
+};