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| author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2014-12-06 00:03:24 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2014-12-09 00:08:26 +0900 |
| commit | 230ce30a51a5fea81ec89ed906ed51975fc0984d (patch) | |
| tree | bd1385b41a6b369c9279158a08c0a3d393e945a0 /arch/arm/dts/uniphier-ph1-sld3.dtsi | |
| parent | f5fd7afcd5bafa4e9682dda3350447c88d6348e6 (diff) | |
| download | u-boot-imx-230ce30a51a5fea81ec89ed906ed51975fc0984d.zip u-boot-imx-230ce30a51a5fea81ec89ed906ed51975fc0984d.tar.gz u-boot-imx-230ce30a51a5fea81ec89ed906ed51975fc0984d.tar.bz2 | |
ARM: UniPhier: add device tree sources for PH1-sLD3
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Diffstat (limited to 'arch/arm/dts/uniphier-ph1-sld3.dtsi')
| -rw-r--r-- | arch/arm/dts/uniphier-ph1-sld3.dtsi | 125 |
1 files changed, 125 insertions, 0 deletions
diff --git a/arch/arm/dts/uniphier-ph1-sld3.dtsi b/arch/arm/dts/uniphier-ph1-sld3.dtsi new file mode 100644 index 0000000..f5529d2 --- /dev/null +++ b/arch/arm/dts/uniphier-ph1-sld3.dtsi @@ -0,0 +1,125 @@ +/* + * Device Tree Source for UniPhier PH1-sLD3 SoC + * + * Copyright (C) 2014 Panasonic Corporation + * Author: Masahiro Yamada <yamada.m@jp.panasonic.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/include/ "skeleton.dtsi" + +/ { + compatible = "panasonic,ph1-sld3"; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <1>; + }; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + uart0: serial@54006800 { + compatible = "panasonic,uniphier-uart"; + status = "disabled"; + reg = <0x54006800 0x20>; + clock-frequency = <36864000>; + }; + + uart1: serial@54006900 { + compatible = "panasonic,uniphier-uart"; + status = "disabled"; + reg = <0x54006900 0x20>; + clock-frequency = <36864000>; + }; + + uart2: serial@54006a00 { + compatible = "panasonic,uniphier-uart"; + status = "disabled"; + reg = <0x54006a00 0x20>; + clock-frequency = <36864000>; + }; + + i2c0: i2c@58400000 { + compatible = "panasonic,uniphier-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x58400000 0x40>; + clock-frequency = <100000>; + status = "disabled"; + }; + + i2c1: i2c@58480000 { + compatible = "panasonic,uniphier-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x58480000 0x40>; + clock-frequency = <100000>; + status = "disabled"; + }; + + i2c2: i2c@58500000 { + compatible = "panasonic,uniphier-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x58500000 0x40>; + clock-frequency = <100000>; + status = "disabled"; + }; + + i2c3: i2c@58580000 { + compatible = "panasonic,uniphier-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x58580000 0x40>; + clock-frequency = <100000>; + status = "disabled"; + }; + + usb0: usb@5a800100 { + compatible = "panasonic,uniphier-ehci", "usb-ehci"; + status = "disabled"; + reg = <0x5a800100 0x100>; + }; + + usb1: usb@5a810100 { + compatible = "panasonic,uniphier-ehci", "usb-ehci"; + status = "disabled"; + reg = <0x5a810100 0x100>; + }; + + usb2: usb@5a820100 { + compatible = "panasonic,uniphier-ehci", "usb-ehci"; + status = "disabled"; + reg = <0x5a820100 0x100>; + }; + + usb3: usb@5a830100 { + compatible = "panasonic,uniphier-ehci", "usb-ehci"; + status = "disabled"; + reg = <0x5a830100 0x100>; + }; + + nand: nand@f8000000 { + compatible = "denali,denali-nand-dt"; + reg = <0xf8000000 0x20>, <0xf8100000 0x1000>; + reg-names = "nand_data", "denali_reg"; + }; + }; +}; |