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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2015-06-30 18:27:00 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2015-07-02 01:06:56 +0900 |
| commit | edcfaeb8fd4829f8ed248556f9f0d996beabc3ba (patch) | |
| tree | 683f8eaae4d8bb25b98b9fa800933fcc0f906be8 /arch/arm/dts/uniphier-ph1-ld4.dtsi | |
| parent | 84875f881e6c992cafa81c0fa4b13da1b1ba857e (diff) | |
| download | u-boot-imx-edcfaeb8fd4829f8ed248556f9f0d996beabc3ba.zip u-boot-imx-edcfaeb8fd4829f8ed248556f9f0d996beabc3ba.tar.gz u-boot-imx-edcfaeb8fd4829f8ed248556f9f0d996beabc3ba.tar.bz2 | |
ARM: dts: UniPhier: sync device trees with the Linux kernel
This makes code diff much easier.
Device trees describe hardware attributes, which are independent
of software architecture. It generally makes sense to synchronize
them beyond software projects.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/dts/uniphier-ph1-ld4.dtsi')
| -rw-r--r-- | arch/arm/dts/uniphier-ph1-ld4.dtsi | 47 |
1 files changed, 44 insertions, 3 deletions
diff --git a/arch/arm/dts/uniphier-ph1-ld4.dtsi b/arch/arm/dts/uniphier-ph1-ld4.dtsi index c200838..c355395 100644 --- a/arch/arm/dts/uniphier-ph1-ld4.dtsi +++ b/arch/arm/dts/uniphier-ph1-ld4.dtsi @@ -1,9 +1,7 @@ /* * Device Tree Source for UniPhier PH1-LD4 SoC * - * Copyright (C) 2014-2015 Panasonic Corporation - * Copyright (C) 2015 Socionext Inc. - * Author: Masahiro Yamada <yamada.masahiro@socionext.com> + * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ */ @@ -24,11 +22,26 @@ }; }; + clocks { + arm_timer_clk: arm_timer_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <50000000>; + }; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; + interrupt-parent = <&intc>; + + extbus: extbus { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + }; uart0: serial@54006800 { compatible = "socionext,uniphier-uart"; @@ -94,6 +107,12 @@ status = "disabled"; }; + system-bus-controller-misc@59800000 { + compatible = "socionext,uniphier-system-bus-controller-misc", + "syscon"; + reg = <0x59800000 0x2000>; + }; + usb0: usb@5a800100 { compatible = "socionext,uniphier-ehci", "generic-ehci"; status = "disabled"; @@ -112,6 +131,28 @@ reg = <0x5a820100 0x100>; }; + timer@60000200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0x60000200 0x20>; + interrupts = <1 11 0x104>; + clocks = <&arm_timer_clk>; + }; + + timer@60000600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0x60000600 0x20>; + interrupts = <1 13 0x104>; + clocks = <&arm_timer_clk>; + }; + + intc: interrupt-controller@60001000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x60001000 0x1000>, + <0x60000100 0x100>; + }; + nand: nand@68000000 { compatible = "denali,denali-nand-dt"; reg = <0x68000000 0x20>, <0x68100000 0x1000>; |