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| author | Amit Singh Tomar <amittomer25@gmail.com> | 2016-07-06 17:59:44 +0530 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2016-07-15 08:34:34 +0200 |
| commit | a29710c525ff43c3031b879e2beac306a09c6944 (patch) | |
| tree | e132b91dc6c3a28dd0079ff029a7b00776445883 /arch/arm/dts/sun8i-h3.dtsi | |
| parent | 26c0c15786039fb437925c08205702169462e343 (diff) | |
| download | u-boot-imx-a29710c525ff43c3031b879e2beac306a09c6944.zip u-boot-imx-a29710c525ff43c3031b879e2beac306a09c6944.tar.gz u-boot-imx-a29710c525ff43c3031b879e2beac306a09c6944.tar.bz2 | |
net: Add EMAC driver for H3/A83T/A64 SoCs.
This patch add EMAC driver support for H3/A83T/A64 SoCs.
Tested on Pine64(A64-External PHY) and Orangepipc(H3-Internal PHY).
BIG Thanks to Andre for providing some of the DT code.
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'arch/arm/dts/sun8i-h3.dtsi')
| -rw-r--r-- | arch/arm/dts/sun8i-h3.dtsi | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/dts/sun8i-h3.dtsi b/arch/arm/dts/sun8i-h3.dtsi index c2f63c5..6ca5e34 100644 --- a/arch/arm/dts/sun8i-h3.dtsi +++ b/arch/arm/dts/sun8i-h3.dtsi @@ -501,6 +501,17 @@ interrupt-controller; #interrupt-cells = <3>; + rgmii_pins: rgmii_pins { + allwinner,pins = "PD0", "PD1", "PD2", "PD3", + "PD4", "PD5", "PD7", + "PD8", "PD9", "PD10", + "PD12", "PD13", "PD15", + "PD16", "PD17"; + allwinner,function = "emac"; + allwinner,drive = <SUN4I_PINCTRL_40_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + uart0_pins_a: uart0@0 { allwinner,pins = "PA4", "PA5"; allwinner,function = "uart0"; @@ -616,6 +627,20 @@ status = "disabled"; }; + emac: ethernet@01c30000 { + compatible = "allwinner,sun8i-h3-emac"; + reg = <0x01c30000 0x2000>, <0x01c00030 0x4>; + reg-names = "emac", "syscon"; + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; + resets = <&ahb_rst 17>, <&ahb_rst 66>; + reset-names = "ahb", "ephy"; + clocks = <&bus_gates 17>, <&bus_gates 128>; + clock-names = "ahb", "ephy"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + gic: interrupt-controller@01c81000 { compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; reg = <0x01c81000 0x1000>, |