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authorYe Li <ye.li@nxp.com>2017-05-15 04:04:07 -0500
committerYe Li <ye.li@nxp.com>2017-05-15 04:08:54 -0500
commit25515dfb16d987931152c1d93aed3a16f7197921 (patch)
tree8a8e0f632da27a13dd9f3190657f493796fcd57c /arch/arm/dts/imx7d-12x12-lpddr3-arm2.dts
parent09f2bc9e534bd9235a298bac6f0df940b315e9b6 (diff)
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MLK-14890 i2c: Enable I2C force idle bus
This patch enables the I2C force idle bus for all i.MX6 and i.MX7 boards to avoid i2c bus problem during reboot. To use it, we must add some i2c properties in DTB file and the GPIO pinctrl for i2c. For mx6qsabreauto, mx6slevk, mx6sxsabresd and mx6sxscm, these boards call the setup_i2c. To remove conflict, change to use "setup_i2c" only for non-DM i2c driver. Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'arch/arm/dts/imx7d-12x12-lpddr3-arm2.dts')
-rw-r--r--arch/arm/dts/imx7d-12x12-lpddr3-arm2.dts24
1 files changed, 22 insertions, 2 deletions
diff --git a/arch/arm/dts/imx7d-12x12-lpddr3-arm2.dts b/arch/arm/dts/imx7d-12x12-lpddr3-arm2.dts
index eb4af7d..e74707b 100644
--- a/arch/arm/dts/imx7d-12x12-lpddr3-arm2.dts
+++ b/arch/arm/dts/imx7d-12x12-lpddr3-arm2.dts
@@ -245,9 +245,12 @@
&i2c1 {
clock-frequency = <100000>;
- pinctrl-names = "default", "sleep";
+ pinctrl-names = "default", "sleep", "gpio";
pinctrl-0 = <&pinctrl_i2c1_1>;
pinctrl-1 = <&pinctrl_i2c1_1>;
+ pinctrl-2 = <&pinctrl_i2c1_1_gpio>;
+ scl-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;
+ sda-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>;
status = "okay";
pmic: pfuze3000@08 {
@@ -343,9 +346,12 @@
&i2c3 {
clock-frequency = <100000>;
- pinctrl-names = "default", "sleep";
+ pinctrl-names = "default", "sleep", "gpio";
pinctrl-0 = <&pinctrl_i2c3_1>;
pinctrl-1 = <&pinctrl_i2c3_1>;
+ pinctrl-2 = <&pinctrl_i2c3_1_gpio>;
+ scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
+ sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
status = "okay";
max7322: gpio@68 {
@@ -613,6 +619,13 @@
>;
};
+ pinctrl_i2c1_1_gpio: i2c1grp-1-gpio {
+ fsl,pins = <
+ MX7D_PAD_I2C1_SDA__GPIO4_IO9 0x7f
+ MX7D_PAD_I2C1_SCL__GPIO4_IO8 0x7f
+ >;
+ };
+
pinctrl_i2c2_1: i2c2grp-1 {
fsl,pins = <
MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f
@@ -627,6 +640,13 @@
>;
};
+ pinctrl_i2c3_1_gpio: i2c3grp-1-gpio {
+ fsl,pins = <
+ MX7D_PAD_I2C3_SDA__GPIO4_IO13 0x7f
+ MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x7f
+ >;
+ };
+
pinctrl_i2c4_1: i2c4grp-1 {
fsl,pins = <
MX7D_PAD_I2C4_SDA__I2C4_SDA 0x4000007f