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authorYe Li <ye.li@nxp.com>2017-05-15 04:04:07 -0500
committerYe Li <ye.li@nxp.com>2017-05-15 04:08:54 -0500
commit25515dfb16d987931152c1d93aed3a16f7197921 (patch)
tree8a8e0f632da27a13dd9f3190657f493796fcd57c /arch/arm/dts/imx6ull-14x14-evk.dts
parent09f2bc9e534bd9235a298bac6f0df940b315e9b6 (diff)
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MLK-14890 i2c: Enable I2C force idle bus
This patch enables the I2C force idle bus for all i.MX6 and i.MX7 boards to avoid i2c bus problem during reboot. To use it, we must add some i2c properties in DTB file and the GPIO pinctrl for i2c. For mx6qsabreauto, mx6slevk, mx6sxsabresd and mx6sxscm, these boards call the setup_i2c. To remove conflict, change to use "setup_i2c" only for non-DM i2c driver. Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'arch/arm/dts/imx6ull-14x14-evk.dts')
-rw-r--r--arch/arm/dts/imx6ull-14x14-evk.dts24
1 files changed, 22 insertions, 2 deletions
diff --git a/arch/arm/dts/imx6ull-14x14-evk.dts b/arch/arm/dts/imx6ull-14x14-evk.dts
index 113a084..ae544f0 100644
--- a/arch/arm/dts/imx6ull-14x14-evk.dts
+++ b/arch/arm/dts/imx6ull-14x14-evk.dts
@@ -223,8 +223,11 @@
&i2c1 {
clock-frequency = <100000>;
- pinctrl-names = "default";
+ pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c1>;
+ pinctrl-1 = <&pinctrl_i2c1_gpio>;
+ scl-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
+ sda-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
status = "okay";
mag3110@0e {
@@ -244,8 +247,11 @@
&i2c2 {
clock_frequency = <100000>;
- pinctrl-names = "default";
+ pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c2>;
+ pinctrl-1 = <&pinctrl_i2c2_gpio>;
+ scl-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
+ sda-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
status = "okay";
codec: wm8960@1a {
@@ -355,6 +361,13 @@
>;
};
+ pinctrl_i2c1_gpio: i2c1grp_gpio {
+ fsl,pins = <
+ MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x1b8b0
+ MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x1b8b0
+ >;
+ };
+
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
@@ -362,6 +375,13 @@
>;
};
+ pinctrl_i2c2_gpio: i2c2grp_gpio {
+ fsl,pins = <
+ MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x1b8b0
+ MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x1b8b0
+ >;
+ };
+
pinctrl_lcdif_dat: lcdifdatgrp {
fsl,pins = <
MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79