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| author | Ye Li <ye.li@nxp.com> | 2017-05-15 04:04:07 -0500 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2017-05-15 04:08:54 -0500 |
| commit | 25515dfb16d987931152c1d93aed3a16f7197921 (patch) | |
| tree | 8a8e0f632da27a13dd9f3190657f493796fcd57c /arch/arm/dts/imx6sll-evk.dts | |
| parent | 09f2bc9e534bd9235a298bac6f0df940b315e9b6 (diff) | |
| download | u-boot-imx-25515dfb16d987931152c1d93aed3a16f7197921.zip u-boot-imx-25515dfb16d987931152c1d93aed3a16f7197921.tar.gz u-boot-imx-25515dfb16d987931152c1d93aed3a16f7197921.tar.bz2 | |
MLK-14890 i2c: Enable I2C force idle bus
This patch enables the I2C force idle bus for all i.MX6 and i.MX7 boards to avoid
i2c bus problem during reboot. To use it, we must add some i2c properties in DTB file
and the GPIO pinctrl for i2c.
For mx6qsabreauto, mx6slevk, mx6sxsabresd and mx6sxscm, these boards call the
setup_i2c. To remove conflict, change to use "setup_i2c" only for non-DM i2c driver.
Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'arch/arm/dts/imx6sll-evk.dts')
| -rw-r--r-- | arch/arm/dts/imx6sll-evk.dts | 24 |
1 files changed, 22 insertions, 2 deletions
diff --git a/arch/arm/dts/imx6sll-evk.dts b/arch/arm/dts/imx6sll-evk.dts index ee72b86..a254b48 100644 --- a/arch/arm/dts/imx6sll-evk.dts +++ b/arch/arm/dts/imx6sll-evk.dts @@ -162,8 +162,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; status = "okay"; pmic: pfuze100@08 { @@ -339,8 +342,11 @@ &i2c3 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_gpio>; + scl-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; status = "okay"; codec: wm8962@1a { @@ -659,6 +665,13 @@ >; }; + pinctrl_i2c1_gpio: i2c1grp_gpio { + fsl,pins = < + MX6SLL_PAD_I2C1_SCL__GPIO3_IO12 0x1b8b1 + MX6SLL_PAD_I2C1_SDA__GPIO3_IO13 0x1b8b1 + >; + }; + pinctrl_i2c3: i2c3grp { fsl,pins = < MX6SLL_PAD_AUD_RXFS__I2C3_SCL 0x4041b8b1 @@ -666,6 +679,13 @@ >; }; + pinctrl_i2c3_gpio: i2c3grp_gpio { + fsl,pins = < + MX6SLL_PAD_AUD_RXFS__GPIO1_IO00 0x41b8b1 + MX6SLL_PAD_AUD_RXC__GPIO1_IO01 0x41b8b1 + >; + }; + pinctrl_pwm1: pmw1grp { fsl,pins = < MX6SLL_PAD_PWM1__PWM1_OUT 0x110b0 |