diff options
| author | Michael Heimpold <mhei@heimpold.de> | 2015-11-15 22:47:12 +0100 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2015-12-01 16:05:24 +0100 |
| commit | a6b1e25fc6f9ad3a392526414acb1c3c36eccd0f (patch) | |
| tree | b16844dc7c582b5a7a0a598288b5e23ead251f68 /arch/arm/cpu | |
| parent | 90447ef03cc7c2b59e9c1e0e8b5afba969c30f99 (diff) | |
| download | u-boot-imx-a6b1e25fc6f9ad3a392526414acb1c3c36eccd0f.zip u-boot-imx-a6b1e25fc6f9ad3a392526414acb1c3c36eccd0f.tar.gz u-boot-imx-a6b1e25fc6f9ad3a392526414acb1c3c36eccd0f.tar.bz2 | |
ARM: mxs: fix VDDD brownout setting
At the moment, the desired brownout is at 1.0V. However,
this setting cannot be realized by hardware since we have
only 3 bits to represent the voltage difference from the
target value.
Target value is 1500 mV, brownout target is 1000 mV,
voltage steps are 25 mV.
Register content calculation:
(1500 [mV] - 1000 [mV]) / 25 [mV] = 20 (decimal) = 0x14
Register takes only 3 bits, that is 0x4.
But 0x4 * 25 [mV] = 100 [mV], that means that actual
brownout level is 1500 [mV] - 100 [mV] = 1.4 V.
Minimum possible BO level is
1500 [mV] - 0x7 * 25 [mV] = 1315 [mV].
So lets use this value as desired BO value (which is
also the same as FSL bootlets use).
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/arm926ejs/mxs/spl_power_init.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c index 42f3df2..1972de8 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c @@ -1221,8 +1221,8 @@ void mxs_power_init(void) debug("SPL: Setting VDDIO to 3V3 (brownout @ 3v15)\n"); mxs_power_set_vddx(&mxs_vddio_cfg, 3300, 3150); - debug("SPL: Setting VDDD to 1V5 (brownout @ 1v0)\n"); - mxs_power_set_vddx(&mxs_vddd_cfg, 1500, 1000); + debug("SPL: Setting VDDD to 1V5 (brownout @ 1v315)\n"); + mxs_power_set_vddx(&mxs_vddd_cfg, 1500, 1315); #ifdef CONFIG_MX23 debug("SPL: Setting mx23 VDDMEM to 2V5 (brownout @ 1v7)\n"); mxs_power_set_vddx(&mxs_vddmem_cfg, 2500, 1700); |