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| author | Nikita Kiryanov <nikita@compulab.co.il> | 2014-08-20 15:08:57 +0300 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2014-09-09 15:35:00 +0200 |
| commit | 08155289a453acee836179553131e9d51ab02a52 (patch) | |
| tree | 463ef053b1b9746aead962dc54ec167093dfef58 /arch/arm/cpu | |
| parent | 06a51b8cc85ac2cfa501b9f537f5aa1514b7c508 (diff) | |
| download | u-boot-imx-08155289a453acee836179553131e9d51ab02a52.zip u-boot-imx-08155289a453acee836179553131e9d51ab02a52.tar.gz u-boot-imx-08155289a453acee836179553131e9d51ab02a52.tar.bz2 | |
arm: mx6: ddr: configure MMDC for slow_pd
According to MX6 TRM, both MMDC and DRAM should be configured to
the same powerdown precharge. Currently, mx6_dram_cfg()
configures MMDC for fast pd (MDPDC[7] = 0), and the DRAM for
'slow exit (DLL off)' (MR0[12] = 0).
Configure MMDC for slow pd.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/ddr.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c index 6e6f337..d22f232 100644 --- a/arch/arm/cpu/armv7/mx6/ddr.c +++ b/arch/arm/cpu/armv7/mx6/ddr.c @@ -469,6 +469,7 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo, mmdc0->mdpdc = (tcke & 0x7) << 16 | 5 << 12 | /* PWDT_1: 256 cycles */ 5 << 8 | /* PWDT_0: 256 cycles */ + 1 << 7 | /* SLOW_PD */ 1 << 6 | /* BOTH_CS_PD */ (tcksrx & 0x7) << 3 | (tcksre & 0x7); |