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| author | Khoronzhuk, Ivan <ivan.khoronzhuk@ti.com> | 2014-09-05 19:02:45 +0300 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-10-23 11:27:04 -0400 |
| commit | afa479cf66dcc3e3648ff714d61995bf132d8ea9 (patch) | |
| tree | ce2d35bad9913105a6ad44175e072c20cc68ea6d /arch/arm/cpu | |
| parent | 68e80fdda1336068f40915388bbdacfd2b75233a (diff) | |
| download | u-boot-imx-afa479cf66dcc3e3648ff714d61995bf132d8ea9.zip u-boot-imx-afa479cf66dcc3e3648ff714d61995bf132d8ea9.tar.gz u-boot-imx-afa479cf66dcc3e3648ff714d61995bf132d8ea9.tar.bz2 | |
keystone2: keystone_nav: don't use hard addresses in qm_config
Use definitions in qm_config. The definitions can be set specifically
for SoC, so there is no reason to check SoC type while initialization.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/armv7/keystone/keystone_nav.c | 49 |
1 files changed, 19 insertions, 30 deletions
diff --git a/arch/arm/cpu/armv7/keystone/keystone_nav.c b/arch/arm/cpu/armv7/keystone/keystone_nav.c index 39d6f99..5219f84 100644 --- a/arch/arm/cpu/armv7/keystone/keystone_nav.c +++ b/arch/arm/cpu/armv7/keystone/keystone_nav.c @@ -15,21 +15,21 @@ static int soc_type = k2hk; #endif -struct qm_config k2hk_qm_memmap = { - .stat_cfg = 0x02a40000, - .queue = (struct qm_reg_queue *)0x02a80000, - .mngr_vbusm = 0x23a80000, - .i_lram = 0x00100000, - .proxy = (struct qm_reg_queue *)0x02ac0000, - .status_ram = 0x02a06000, - .mngr_cfg = (struct qm_cfg_reg *)0x02a02000, - .intd_cfg = 0x02a0c000, - .desc_mem = (struct descr_mem_setup_reg *)0x02a03000, - .region_num = 64, - .pdsp_cmd = 0x02a20000, - .pdsp_ctl = 0x02a0f000, - .pdsp_iram = 0x02a10000, - .qpool_num = 4000, +struct qm_config qm_memmap = { + .stat_cfg = KS2_QM_QUEUE_STATUS_BASE, + .queue = (void *)KS2_QM_MANAGER_QUEUES_BASE, + .mngr_vbusm = KS2_QM_BASE_ADDRESS, + .i_lram = KS2_QM_LINK_RAM_BASE, + .proxy = (void *)KS2_QM_MANAGER_Q_PROXY_BASE, + .status_ram = KS2_QM_STATUS_RAM_BASE, + .mngr_cfg = (void *)KS2_QM_CONF_BASE, + .intd_cfg = KS2_QM_INTD_CONF_BASE, + .desc_mem = (void *)KS2_QM_DESC_SETUP_BASE, + .region_num = KS2_QM_REGION_NUM, + .pdsp_cmd = KS2_QM_PDSP1_CMD_BASE, + .pdsp_ctl = KS2_QM_PDSP1_CTRL_BASE, + .pdsp_iram = KS2_QM_PDSP1_IRAM_BASE, + .qpool_num = KS2_QM_QPOOL_NUM, }; /* @@ -52,12 +52,9 @@ inline int num_of_desc_to_reg(int num_descr) return 15; } -static int _qm_init(struct qm_config *cfg) +int _qm_init(struct qm_config *cfg) { - u32 j; - - if (cfg == NULL) - return QM_ERR; + u32 j; qm_cfg = cfg; @@ -82,12 +79,7 @@ static int _qm_init(struct qm_config *cfg) int qm_init(void) { - switch (soc_type) { - case k2hk: - return _qm_init(&k2hk_qm_memmap); - } - - return QM_ERR; + return _qm_init(&qm_memmap); } void qm_close(void) @@ -294,11 +286,8 @@ static int _netcp_init(struct pktdma_cfg *netcp_cfg, /* Disable loopback in the tx direction */ writel(0, &netcp->global->emulation_control); -/* TODO: make it dependend on a soc type variable */ -#ifdef CONFIG_SOC_K2HK /* Set QM base address, only for K2x devices */ - writel(0x23a80000, &netcp->global->qm_base_addr[0]); -#endif + writel(KS2_QM_BASE_ADDRESS, &netcp->global->qm_base_addr[0]); /* Enable all channels. The current state isn't important */ for (j = 0; j < netcp->tx_ch_num; j++) { |