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| author | York Sun <yorksun@freescale.com> | 2014-06-23 15:15:56 -0700 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2014-07-04 19:48:41 +0200 |
| commit | f749db3a75ec483692d7bb6d46a1fbecb65c38ba (patch) | |
| tree | 20033069fbaa0a0539bc72620bafcc143a42b963 /arch/arm/cpu | |
| parent | b940ca64b22ba8980fd4ec8dda028f6b1a2ed79d (diff) | |
| download | u-boot-imx-f749db3a75ec483692d7bb6d46a1fbecb65c38ba.zip u-boot-imx-f749db3a75ec483692d7bb6d46a1fbecb65c38ba.tar.gz u-boot-imx-f749db3a75ec483692d7bb6d46a1fbecb65c38ba.tar.bz2 | |
ARMv8/ls2085a_emu: Add LS2085A emulator and simulator board support
LS2085A is an ARMv8 implementation. This adds board support for emulator
and simulator:
Two DDR controllers
UART2 is used as the console
IFC timing is tightened for speedy booting
Support DDR3 and DDR4 as separated targets
Management Complex (MC) is enabled
Support for GIC 500 (based on GICv3 arch)
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-lsch3/README | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/README b/arch/arm/cpu/armv8/fsl-lsch3/README index de34a91..cc47466 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/README +++ b/arch/arm/cpu/armv8/fsl-lsch3/README @@ -7,4 +7,4 @@ Freescale LayerScape with Chassis Generation 3 This architecture supports Freescale ARMv8 SoCs with Chassis generation 3, -for example LS2100A. +for example LS2085A. |