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| author | Simon Glass <sjg@chromium.org> | 2012-01-09 13:22:15 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-02-12 10:11:22 +0100 |
| commit | bd29cb05f2bd655a15ba32d96a0b4028b83be320 (patch) | |
| tree | 97236ed97eaba06110e68af6181b7dd577a451c6 /arch/arm/cpu | |
| parent | 98450d0220eea0ab32385063e2e27fb1eb92a746 (diff) | |
| download | u-boot-imx-bd29cb05f2bd655a15ba32d96a0b4028b83be320.zip u-boot-imx-bd29cb05f2bd655a15ba32d96a0b4028b83be320.tar.gz u-boot-imx-bd29cb05f2bd655a15ba32d96a0b4028b83be320.tar.bz2 | |
tegra2: Enable data cache
This enables the data cache on Tegra2 boards.
As discussed on the list, this is better off in the Tegra2 cpu code than in a
particular vendor directory. We should be safe turning on the cache for all
Tegra2 boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/armv7/tegra2/board.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/tegra2/board.c b/arch/arm/cpu/armv7/tegra2/board.c index 8e28d08..349d50e 100644 --- a/arch/arm/cpu/armv7/tegra2/board.c +++ b/arch/arm/cpu/armv7/tegra2/board.c @@ -141,3 +141,11 @@ void board_init_uart_f(void) #endif setup_uarts(uart_ids); } + +#ifndef CONFIG_SYS_DCACHE_OFF +void enable_caches(void) +{ + /* Enable D-cache. I-cache is already enabled in start.S */ + dcache_enable(); +} +#endif |