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author | Albert Aribaud <albert.aribaud@free.fr> | 2010-07-13 09:04:26 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2010-08-10 22:44:12 +0200 |
commit | 4cfa0ab2c945f95e978a995721f193dd056e538d (patch) | |
tree | 0d83a5f272e4b2f8a9a6296bcbe3eaf43fe52b2d /arch/arm/cpu | |
parent | fe8d63c8c75acc87d398b2e181b9135d2ecfc05a (diff) | |
download | u-boot-imx-4cfa0ab2c945f95e978a995721f193dd056e538d.zip u-boot-imx-4cfa0ab2c945f95e978a995721f193dd056e538d.tar.gz u-boot-imx-4cfa0ab2c945f95e978a995721f193dd056e538d.tar.bz2 |
orion5x: allow overriding default mappings windows
Turn all ORION5X_DEF{ADR,SZ}_xxx macros into ORION5X_{ADR,SZ}_xxx
and allow defining them from board code to override defaults. This
is particularly useful for defining board-specific FLASH address
and size in board header file rather than having to tweak orion5x
code.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r-- | arch/arm/cpu/arm926ejs/orion5x/cpu.c | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/arch/arm/cpu/arm926ejs/orion5x/cpu.c b/arch/arm/cpu/arm926ejs/orion5x/cpu.c index f3c1e21..3740e33 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/cpu.c +++ b/arch/arm/cpu/arm926ejs/orion5x/cpu.c @@ -87,56 +87,56 @@ int orion5x_config_adr_windows(void) (struct orion5x_win_registers *)ORION5X_CPU_WIN_BASE; /* Window 0: PCIE MEM address space */ - writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_PCIE_MEM, + writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_PCIE_MEM, ORION5X_TARGET_PCIE, ORION5X_ATTR_PCIE_MEM, ORION5X_WIN_ENABLE), &winregs[0].ctrl); - writel(ORION5X_DEFADR_PCIE_MEM, &winregs[0].base); - writel(ORION5X_DEFADR_PCIE_MEM_REMAP_LO, &winregs[0].remap_lo); - writel(ORION5X_DEFADR_PCIE_MEM_REMAP_HI, &winregs[0].remap_hi); + writel(ORION5X_ADR_PCIE_MEM, &winregs[0].base); + writel(ORION5X_ADR_PCIE_MEM_REMAP_LO, &winregs[0].remap_lo); + writel(ORION5X_ADR_PCIE_MEM_REMAP_HI, &winregs[0].remap_hi); /* Window 1: PCIE IO address space */ - writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_PCIE_IO, + writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_PCIE_IO, ORION5X_TARGET_PCIE, ORION5X_ATTR_PCIE_IO, ORION5X_WIN_ENABLE), &winregs[1].ctrl); - writel(ORION5X_DEFADR_PCIE_IO, &winregs[1].base); - writel(ORION5X_DEFADR_PCIE_IO_REMAP_LO, &winregs[1].remap_lo); - writel(ORION5X_DEFADR_PCIE_IO_REMAP_HI, &winregs[1].remap_hi); + writel(ORION5X_ADR_PCIE_IO, &winregs[1].base); + writel(ORION5X_ADR_PCIE_IO_REMAP_LO, &winregs[1].remap_lo); + writel(ORION5X_ADR_PCIE_IO_REMAP_HI, &winregs[1].remap_hi); /* Window 2: PCI MEM address space */ - writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_PCI_MEM, + writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_PCI_MEM, ORION5X_TARGET_PCI, ORION5X_ATTR_PCI_MEM, ORION5X_WIN_ENABLE), &winregs[2].ctrl); - writel(ORION5X_DEFADR_PCI_MEM, &winregs[2].base); + writel(ORION5X_ADR_PCI_MEM, &winregs[2].base); /* Window 3: PCI IO address space */ - writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_PCI_IO, + writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_PCI_IO, ORION5X_TARGET_PCI, ORION5X_ATTR_PCI_IO, ORION5X_WIN_ENABLE), &winregs[3].ctrl); - writel(ORION5X_DEFADR_PCI_IO, &winregs[3].base); + writel(ORION5X_ADR_PCI_IO, &winregs[3].base); /* Window 4: DEV_CS0 address space */ - writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_DEV_CS0, + writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_DEV_CS0, ORION5X_TARGET_DEVICE, ORION5X_ATTR_DEV_CS0, ORION5X_WIN_ENABLE), &winregs[4].ctrl); - writel(ORION5X_DEFADR_DEV_CS0, &winregs[4].base); + writel(ORION5X_ADR_DEV_CS0, &winregs[4].base); /* Window 5: DEV_CS1 address space */ - writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_DEV_CS1, + writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_DEV_CS1, ORION5X_TARGET_DEVICE, ORION5X_ATTR_DEV_CS1, ORION5X_WIN_ENABLE), &winregs[5].ctrl); - writel(ORION5X_DEFADR_DEV_CS1, &winregs[5].base); + writel(ORION5X_ADR_DEV_CS1, &winregs[5].base); /* Window 6: DEV_CS2 address space */ - writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_DEV_CS2, + writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_DEV_CS2, ORION5X_TARGET_DEVICE, ORION5X_ATTR_DEV_CS2, ORION5X_WIN_ENABLE), &winregs[6].ctrl); - writel(ORION5X_DEFADR_DEV_CS2, &winregs[6].base); + writel(ORION5X_ADR_DEV_CS2, &winregs[6].base); /* Window 7: BOOT Memory address space */ - writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_BOOTROM, + writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_BOOTROM, ORION5X_TARGET_DEVICE, ORION5X_ATTR_BOOTROM, ORION5X_WIN_ENABLE), &winregs[7].ctrl); - writel(ORION5X_DEFADR_BOOTROM, &winregs[7].base); + writel(ORION5X_ADR_BOOTROM, &winregs[7].base); return 0; } |