diff options
| author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-04-12 08:51:41 +0200 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-04-12 08:51:41 +0200 |
| commit | c97b6df1ae92679d67f94c1cfef51323782a506d (patch) | |
| tree | 8b99745ad084fc5e62afd0a14cb4bbb428f288a5 /arch/arm/cpu | |
| parent | 60442b303958237d845e16fc07fe78992e09d6a7 (diff) | |
| parent | eef6da0326834cc90b9f3b2e80dec71ee8e39e9a (diff) | |
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/arm926ejs/omap/timer.c | 15 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/omap4/hw_data.c | 8 |
2 files changed, 12 insertions, 11 deletions
diff --git a/arch/arm/cpu/arm926ejs/omap/timer.c b/arch/arm/cpu/arm926ejs/omap/timer.c index 34ec7b2..16530b0 100644 --- a/arch/arm/cpu/arm926ejs/omap/timer.c +++ b/arch/arm/cpu/arm926ejs/omap/timer.c @@ -36,11 +36,14 @@ */ #include <common.h> +#include <asm/io.h> -#define TIMER_LOAD_VAL 0xffffffff +#define TIMER_CLOCK (CONFIG_SYS_CLK_FREQ / (2 << CONFIG_SYS_PTV)) +#define TIMER_LOAD_VAL 0xffffffff /* macro to read the 32 bit timer */ -#define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+8)) +#define READ_TIMER readl(CONFIG_SYS_TIMERBASE+8) \ + / (TIMER_CLOCK / CONFIG_SYS_HZ) DECLARE_GLOBAL_DATA_PTR; @@ -114,7 +117,8 @@ ulong get_timer_masked (void) * (TLV-now) amount of time after passing though -1 * nts = new "advancing time stamp"...it could also roll and cause problems. */ - timestamp += lastdec + TIMER_LOAD_VAL - now; + timestamp += lastdec + (TIMER_LOAD_VAL / (TIMER_CLOCK / + CONFIG_SYS_HZ)) - now; } lastdec = now; @@ -160,8 +164,5 @@ unsigned long long get_ticks(void) */ ulong get_tbclk (void) { - ulong tbclk; - - tbclk = CONFIG_SYS_HZ; - return tbclk; + return CONFIG_SYS_HZ; } diff --git a/arch/arm/cpu/armv7/omap4/hw_data.c b/arch/arm/cpu/armv7/omap4/hw_data.c index 7551b98..04977b4 100644 --- a/arch/arm/cpu/armv7/omap4/hw_data.c +++ b/arch/arm/cpu/armv7/omap4/hw_data.c @@ -216,14 +216,14 @@ struct dplls omap4460_dplls = { struct pmic_data twl6030_4430es1 = { .base_offset = PHOENIX_SMPS_BASE_VOLT_STD_MODE_UV, - .step = 12660, /* 10 mV represented in uV */ + .step = 12660, /* 12.66 mV represented in uV */ /* The code starts at 1 not 0 */ .start_code = 1, }; struct pmic_data twl6030 = { .base_offset = PHOENIX_SMPS_BASE_VOLT_STD_MODE_WITH_OFFSET_UV, - .step = 12660, /* 10 mV represented in uV */ + .step = 12660, /* 12.66 mV represented in uV */ /* The code starts at 1 not 0 */ .start_code = 1, }; @@ -271,11 +271,11 @@ struct vcores_data omap4460_volts = { .core.value = 1200, .core.addr = SMPS_REG_ADDR_VCORE1, - .core.pmic = &tps62361, + .core.pmic = &twl6030, .mm.value = 1200, .mm.addr = SMPS_REG_ADDR_VCORE2, - .mm.pmic = &tps62361, + .mm.pmic = &twl6030, }; /* |