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| author | Andre Renaud <andre@bluewatersys.com> | 2014-06-10 08:47:13 +1200 |
|---|---|---|
| committer | Ye.Li <B37916@freescale.com> | 2014-07-15 18:54:16 +0800 |
| commit | 6105dd636321a38d506aab4312083a50e69bd1fe (patch) | |
| tree | d4e8d094bd57607a9af1c57decd85f0603968267 /arch/arm/cpu | |
| parent | 100ed884e0cc2cd7c90d210bab12ff53a55a0e3c (diff) | |
| download | u-boot-imx-6105dd636321a38d506aab4312083a50e69bd1fe.zip u-boot-imx-6105dd636321a38d506aab4312083a50e69bd1fe.tar.gz u-boot-imx-6105dd636321a38d506aab4312083a50e69bd1fe.tar.bz2 | |
MX6: Correct calculation of PLL_SYS
DIV_SELECT is used as Fout = Fin * div_select / 2.0, so we should do
the shift after the multiply to avoid rounding errors
Signed-off-by: Andre Renaud <andre@bluewatersys.com>
(cherry picked from commit 2eb268f6fd236a5ad9d51e7e47190d7994b3920f)
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/clock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index eed413d..abe2d81 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -80,7 +80,7 @@ static u32 decode_pll(enum pll_clocks pll, u32 infreq) div = __raw_readl(&imx_ccm->analog_pll_sys); div &= BM_ANADIG_PLL_SYS_DIV_SELECT; - return infreq * (div >> 1); + return (infreq * div) >> 1; case PLL_BUS: div = __raw_readl(&imx_ccm->analog_pll_528); div &= BM_ANADIG_PLL_528_DIV_SELECT; |