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authorTang Yuantian <Yuantian.Tang@nxp.com>2016-08-08 15:07:19 +0800
committerYork Sun <york.sun@nxp.com>2016-10-06 09:52:35 -0700
commitf0beb49290c4e6af7d88895a15a45bbea38318fe (patch)
tree7f93b267a01c6672e587c40a5eb40c63c49a06b0 /arch/arm/cpu
parent53fec162061811a73c7dab3207f8fdb2343ae289 (diff)
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armv8: fsl-lsch2: adjust sata parameter
The default values for Port Phy2Cfg register and Port Phy3Cfg register are better, no need to overwrite them. Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/soc.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 463d1e3..4b425b8 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -233,8 +233,6 @@ int sata_init(void)
out_le32((void *)CONFIG_SYS_DCSR_DCFG_ADDR + 0x520, 0x80000000);
#endif
out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
- out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY_2_CFG);
- out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY_3_CFG);
out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG);
ahci_init((void __iomem *)CONFIG_SYS_SATA);