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authorThierry Reding <treding@nvidia.com>2015-07-22 17:10:11 -0600
committerTom Warren <twarren@nvidia.com>2015-07-28 10:30:17 -0700
commit8b19dff579759719b83a3dcbeefecd774077dc08 (patch)
tree6139678865af04fad071b98fcc5ea1bbc514cd4c /arch/arm/cpu
parent502a2aff7637d6522f50839b4d9ac253fcb1ea6e (diff)
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armv8/cache: Fix page table creation
While generating the page tables, a running integer index is shifted by SECTION_SHIFT (29) and causes overflow for any integer bigger than 7. The page tables therefore alias to the same 8 sections and cause U-Boot to hang once the MMU is enabled. Fix this by making the index a 64-bit unsigned integer and so avoid the overflow. swarren notes: currently "i" ranges from 0..8191 on all ARM64 boards, and "j" varies depending on RAM size; from 4 to 11 for a board with 4GB at physical address 2GB, as some Tegra boards have. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/armv8/cache_v8.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index c5ec529..254a629 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -25,9 +25,9 @@ void set_pgtable_section(u64 *page_table, u64 index, u64 section,
/* to activate the MMU we need to set up virtual memory */
static void mmu_setup(void)
{
- int i, j, el;
bd_t *bd = gd->bd;
- u64 *page_table = (u64 *)gd->arch.tlb_addr;
+ u64 *page_table = (u64 *)gd->arch.tlb_addr, i, j;
+ int el;
/* Setup an identity-mapping for all spaces */
for (i = 0; i < (PGTABLE_SIZE >> 3); i++) {