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authorYork Sun <yorksun@freescale.com>2015-11-12 12:38:21 -0800
committerYork Sun <yorksun@freescale.com>2015-11-30 09:11:12 -0800
commit1f6236f06b1bb219492d7ae3c17232090128da2c (patch)
tree8f10424c2b2e353802eb2117a160b0c4b50bd463 /arch/arm/cpu
parentda305b9f57cd459a26d276390f699666a5d8bc4f (diff)
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armv8: fsl-layerscape: Fix "cpu release" command
When one core is released, other cores may not have valid entry address. Those cores are trapped by "wfe" and wait for further instruction. When their address is set, they need to be kicked off by "sev". Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/mp.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/mp.c b/arch/arm/cpu/armv8/fsl-layerscape/mp.c
index 0d600db..df7ffb8 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/mp.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/mp.c
@@ -192,6 +192,12 @@ int cpu_release(int nr, int argc, char * const argv[])
(unsigned long)table + SPIN_TABLE_ELEM_SIZE);
asm volatile("dsb st");
smp_kick_all_cpus(); /* only those with entry addr set will run */
+ /*
+ * When the first release command runs, all cores are set to go. Those
+ * without a valid entry address will be trapped by "wfe". "sev" kicks
+ * them off to check the address again. When set, they continue to run.
+ */
+ asm volatile("sev");
return 0;
}