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authorStephen Warren <swarren@nvidia.com>2014-04-21 14:50:33 -0600
committerTom Warren <twarren@nvidia.com>2014-05-13 10:41:31 -0700
commit48ec7a946815e984f20b9478edfe46d4b08484c7 (patch)
treeff6abc3a612bb0ef4381b402be3fe663e500f21c /arch/arm/cpu
parentf175603f7c4fe614c913476bfec78a36ae8be7a3 (diff)
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ARM: tegra: fix CPU VDD comment in Tegra30 CPU init code
The register writes performed by arch/arm/cpu/arm720t/tegra30/cpu.c enable_cpu_power_rail() set the voltage to 1.0V not 1.4V as the comment implies. Fix the comment. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/arm720t/tegra30/cpu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/arm720t/tegra30/cpu.c b/arch/arm/cpu/arm720t/tegra30/cpu.c
index a806483..85a945b 100644
--- a/arch/arm/cpu/arm720t/tegra30/cpu.c
+++ b/arch/arm/cpu/arm720t/tegra30/cpu.c
@@ -60,7 +60,7 @@ static void enable_cpu_power_rail(void)
/*
* Bring up CPU VDD via the TPS65911x PMIC on the DVC I2C bus.
- * First set VDD to 1.4V, then enable the VDD regulator.
+ * First set VDD to 1.0V, then enable the VDD regulator.
*/
tegra_i2c_ll_write_addr(TPS65911_I2C_ADDR, 2);
tegra_i2c_ll_write_data(TPS65911_VDDCTRL_OP_DATA, I2C_SEND_2_BYTES);