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authorTom Rini <trini@ti.com>2014-10-23 14:05:34 -0400
committerTom Rini <trini@ti.com>2014-10-23 14:05:34 -0400
commit03a3536c7b7f2902932606da9248c6f08318174a (patch)
tree414815bd812360c88c338416f5bb6c67ed7ba75d /arch/arm/cpu
parent7bfd5ee1170eca10d26858b6b2ed36317cc686fd (diff)
parent9aafef4f360616a507578b8868092f096b093aa9 (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-tegra
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/armv7/tegra30/Kconfig4
-rw-r--r--arch/arm/cpu/tegra-common/board.c64
2 files changed, 17 insertions, 51 deletions
diff --git a/arch/arm/cpu/armv7/tegra30/Kconfig b/arch/arm/cpu/armv7/tegra30/Kconfig
index 54aec4e..3abdc7b 100644
--- a/arch/arm/cpu/armv7/tegra30/Kconfig
+++ b/arch/arm/cpu/armv7/tegra30/Kconfig
@@ -3,6 +3,9 @@ if TEGRA30
choice
prompt "Tegra30 board select"
+config TARGET_APALIS_T30
+ bool "Toradex Apalis T30 board"
+
config TARGET_BEAVER
bool "NVIDIA Tegra30 Beaver evaluation board"
@@ -20,6 +23,7 @@ endchoice
config SYS_SOC
default "tegra30"
+source "board/toradex/apalis_t30/Kconfig"
source "board/nvidia/beaver/Kconfig"
source "board/nvidia/cardhu/Kconfig"
source "board/toradex/colibri_t30/Kconfig"
diff --git a/arch/arm/cpu/tegra-common/board.c b/arch/arm/cpu/tegra-common/board.c
index 433da09..b6a84a5 100644
--- a/arch/arm/cpu/tegra-common/board.c
+++ b/arch/arm/cpu/tegra-common/board.c
@@ -9,6 +9,7 @@
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/funcmux.h>
+#include <asm/arch/mc.h>
#include <asm/arch/tegra.h>
#include <asm/arch-tegra/board.h>
#include <asm/arch-tegra/pmc.h>
@@ -27,55 +28,6 @@ enum {
UART_COUNT = 5,
};
-#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \
- defined(CONFIG_TEGRA114)
-/*
- * Boot ROM initializes the odmdata in APBDEV_PMC_SCRATCH20_0,
- * so we are using this value to identify memory size.
- */
-unsigned int query_sdram_size(void)
-{
- struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
- u32 reg;
-
- reg = readl(&pmc->pmc_scratch20);
- debug("pmc->pmc_scratch20 (ODMData) = 0x%08x\n", reg);
-
-#if defined(CONFIG_TEGRA20)
- /* bits 30:28 in OdmData are used for RAM size on T20 */
- reg &= 0x70000000;
-
- switch ((reg) >> 28) {
- case 1:
- return 0x10000000; /* 256 MB */
- case 0:
- case 2:
- default:
- return 0x20000000; /* 512 MB */
- case 3:
- return 0x40000000; /* 1GB */
- }
-#else /* Tegra30/Tegra114 */
- /* bits 31:28 in OdmData are used for RAM size on T30 */
- switch ((reg) >> 28) {
- case 0:
- case 1:
- default:
- return 0x10000000; /* 256 MB */
- case 2:
- return 0x20000000; /* 512 MB */
- case 3:
- return 0x30000000; /* 768 MB */
- case 4:
- return 0x40000000; /* 1GB */
- case 8:
- return 0x7ff00000; /* 2GB - 1MB */
- }
-#endif
-}
-#else
-#include <asm/arch/mc.h>
-
/* Read the RAM size directly from the memory controller */
unsigned int query_sdram_size(void)
{
@@ -83,12 +35,22 @@ unsigned int query_sdram_size(void)
u32 size_mb;
size_mb = readl(&mc->mc_emem_cfg);
+#if defined(CONFIG_TEGRA20)
+ debug("mc->mc_emem_cfg (MEM_SIZE_KB) = 0x%08x\n", size_mb);
+ size_mb = get_ram_size((void *)PHYS_SDRAM_1, size_mb * 1024);
+#else
debug("mc->mc_emem_cfg (MEM_SIZE_MB) = 0x%08x\n", size_mb);
+ size_mb = get_ram_size((void *)PHYS_SDRAM_1, size_mb * 1024 * 1024);
+#endif
- return size_mb * 1024 * 1024;
-}
+#if defined(CONFIG_TEGRA30) || defined(CONFIG_TEGRA114)
+ /* External memory limited to 2047 MB due to IROM/HI-VEC */
+ if (size_mb == SZ_2G) size_mb -= SZ_1M;
#endif
+ return size_mb;
+}
+
int dram_init(void)
{
/* We do not initialise DRAM here. We just query the size */