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authorAkshay Saraswat <akshay.s@samsung.com>2015-02-20 13:27:18 +0530
committerMinkyu Kang <mk7.kang@samsung.com>2015-02-28 18:03:46 +0900
commitcecf2db23b256d84ed54e1442b646f07373e5caa (patch)
tree15aae28b64d6ad4da8a80dc5b195bb8264ae3321 /arch/arm/cpu
parent7e514eef02d2508a19be13d3efdf747c4e7ef5c5 (diff)
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Exynos542x: Fix secondary core booting for thumb
When compiled SPL for Thumb secondary cores failed to boot at the kernel boot up. Only one core came up out of 4. This was happening because the code relocated to the address 0x02073000 by the primary core was an ARM asm code which was executed by the secondary cores as if it was a thumb code. This patch fixes the issue of secondary cores considering relocated code as Thumb instructions and not ARM instructions by jumping to the relocated with the help of "bx" ARM instruction. "bx" instruction changes the 5th bit of CPSR which allows execution unit to consider the following instructions as ARM instructions. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/armv7/exynos/lowlevel_init.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/exynos/lowlevel_init.c b/arch/arm/cpu/armv7/exynos/lowlevel_init.c
index 0504576..782ecd1 100644
--- a/arch/arm/cpu/armv7/exynos/lowlevel_init.c
+++ b/arch/arm/cpu/armv7/exynos/lowlevel_init.c
@@ -89,7 +89,7 @@ static void secondary_cpu_start(void)
{
v7_enable_smp(EXYNOS5420_INFORM_BASE);
svc32_mode_en();
- set_pc(CONFIG_EXYNOS_RELOCATE_CODE_BASE);
+ branch_bx(CONFIG_EXYNOS_RELOCATE_CODE_BASE);
}
/*