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authorMasahiro Yamada <yamada.m@jp.panasonic.com>2014-11-07 03:03:31 +0900
committerTom Rini <trini@ti.com>2014-11-23 06:48:30 -0500
commitb41411954d4ccf6ddaa581178462017557b82b5d (patch)
treef9439432d8dfa1073b0ba7b84f8289c4a9835c5f /arch/arm/cpu
parent111396ccb9a8d3e1f0e9d9921d3dbd6c7a70423f (diff)
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linux/kernel.h: sync min, max, min3, max3 macros with Linux
U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/arm1176/tnetv107x/clock.c4
-rw-r--r--arch/arm/cpu/armv7/exynos/clock.c4
-rw-r--r--arch/arm/cpu/armv7/exynos/spl_boot.c2
-rw-r--r--arch/arm/cpu/armv7/tegra20/display.c4
4 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/cpu/arm1176/tnetv107x/clock.c b/arch/arm/cpu/arm1176/tnetv107x/clock.c
index 47c23bb..7ba28d3 100644
--- a/arch/arm/cpu/arm1176/tnetv107x/clock.c
+++ b/arch/arm/cpu/arm1176/tnetv107x/clock.c
@@ -16,7 +16,7 @@
#define BIT(x) (1 << (x))
#define MAX_PREDIV 64
-#define MAX_POSTDIV 8
+#define MAX_POSTDIV 8UL
#define MAX_MULT 512
#define MAX_DIV (MAX_PREDIV * MAX_POSTDIV)
@@ -362,7 +362,7 @@ static void init_pll(const struct pll_init_data *data)
pllctl_reg_write(data->pll, ctl, tmp);
mult = data->pll_freq / fpll;
- for (mult = max(mult, 1); mult <= MAX_MULT; mult++) {
+ for (mult = max(mult, 1UL); mult <= MAX_MULT; mult++) {
div = (fpll * mult) / data->pll_freq;
if (div < 1 || div > MAX_DIV)
continue;
diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c
index 7558eff..c0c95fb 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -1422,8 +1422,8 @@ static int clock_calc_best_scalar(unsigned int main_scaler_bits,
return 1;
for (i = 1; i <= loops; i++) {
- const unsigned int effective_div = max(min(input_rate / i /
- target_rate, cap), 1);
+ const unsigned int effective_div =
+ max(min(input_rate / i / target_rate, cap), 1U);
const unsigned int effective_rate = input_rate / i /
effective_div;
const int error = target_rate - effective_rate;
diff --git a/arch/arm/cpu/armv7/exynos/spl_boot.c b/arch/arm/cpu/armv7/exynos/spl_boot.c
index 658e4cb..ae3ad01 100644
--- a/arch/arm/cpu/armv7/exynos/spl_boot.c
+++ b/arch/arm/cpu/armv7/exynos/spl_boot.c
@@ -151,7 +151,7 @@ static void exynos_spi_copy(unsigned int uboot_size, unsigned int uboot_addr)
}
for (upto = 0, i = 0; upto < uboot_size; upto += todo, i++) {
- todo = min(uboot_size - upto, (1 << 15));
+ todo = min(uboot_size - upto, (unsigned int)(1 << 15));
spi_rx_tx(regs, todo, (void *)(uboot_addr),
(void *)(SPI_FLASH_UBOOT_POS), i);
}
diff --git a/arch/arm/cpu/armv7/tegra20/display.c b/arch/arm/cpu/armv7/tegra20/display.c
index d98cec9..61efed6 100644
--- a/arch/arm/cpu/armv7/tegra20/display.c
+++ b/arch/arm/cpu/armv7/tegra20/display.c
@@ -45,8 +45,8 @@ static void update_window(struct dc_ctlr *dc, struct disp_ctl_win *win)
writel(0, &dc->win.h_initial_dda);
writel(0, &dc->win.v_initial_dda);
- h_dda = (win->w * 0x1000) / max(win->out_w - 1, 1);
- v_dda = (win->h * 0x1000) / max(win->out_h - 1, 1);
+ h_dda = (win->w * 0x1000) / max(win->out_w - 1, 1U);
+ v_dda = (win->h * 0x1000) / max(win->out_h - 1, 1U);
val = h_dda << H_DDA_INC_SHIFT;
val |= v_dda << V_DDA_INC_SHIFT;