diff options
author | Otavio Salvador <otavio@ossystems.com.br> | 2012-08-05 09:05:31 +0000 |
---|---|---|
committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-09-01 14:58:17 +0200 |
commit | 9c471142bc6c5aa01532ba85ead8509bbf2eb153 (patch) | |
tree | 31f9e67e6c63a7abf63997bb9542fbd3075a61da /arch/arm/cpu | |
parent | ddcf13b15231ee2dca99285349b143c365ce5173 (diff) | |
download | u-boot-imx-9c471142bc6c5aa01532ba85ead8509bbf2eb153.zip u-boot-imx-9c471142bc6c5aa01532ba85ead8509bbf2eb153.tar.gz u-boot-imx-9c471142bc6c5aa01532ba85ead8509bbf2eb153.tar.bz2 |
mxs: prefix register structs with 'mxs' prefix
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r-- | arch/arm/cpu/arm926ejs/mxs/clock.c | 36 | ||||
-rw-r--r-- | arch/arm/cpu/arm926ejs/mxs/mx28.c | 28 | ||||
-rw-r--r-- | arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c | 4 | ||||
-rw-r--r-- | arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 24 | ||||
-rw-r--r-- | arch/arm/cpu/arm926ejs/mxs/spl_power_init.c | 116 | ||||
-rw-r--r-- | arch/arm/cpu/arm926ejs/mxs/timer.c | 8 |
6 files changed, 108 insertions, 108 deletions
diff --git a/arch/arm/cpu/arm926ejs/mxs/clock.c b/arch/arm/cpu/arm926ejs/mxs/clock.c index 3e29c56..bfea6ab 100644 --- a/arch/arm/cpu/arm926ejs/mxs/clock.c +++ b/arch/arm/cpu/arm926ejs/mxs/clock.c @@ -43,8 +43,8 @@ static uint32_t mx28_get_pclk(void) { - struct mx28_clkctrl_regs *clkctrl_regs = - (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE; + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; uint32_t clkctrl, clkseq, div; uint8_t clkfrac, frac; @@ -75,8 +75,8 @@ static uint32_t mx28_get_pclk(void) static uint32_t mx28_get_hclk(void) { - struct mx28_clkctrl_regs *clkctrl_regs = - (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE; + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; uint32_t div; uint32_t clkctrl; @@ -93,8 +93,8 @@ static uint32_t mx28_get_hclk(void) static uint32_t mx28_get_emiclk(void) { - struct mx28_clkctrl_regs *clkctrl_regs = - (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE; + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; uint32_t clkctrl, clkseq, div; uint8_t clkfrac, frac; @@ -118,8 +118,8 @@ static uint32_t mx28_get_emiclk(void) static uint32_t mx28_get_gpmiclk(void) { - struct mx28_clkctrl_regs *clkctrl_regs = - (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE; + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; uint32_t clkctrl, clkseq, div; uint8_t clkfrac, frac; @@ -145,8 +145,8 @@ static uint32_t mx28_get_gpmiclk(void) */ void mx28_set_ioclk(enum mxs_ioclock io, uint32_t freq) { - struct mx28_clkctrl_regs *clkctrl_regs = - (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE; + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; uint32_t div; int io_reg; @@ -178,8 +178,8 @@ void mx28_set_ioclk(enum mxs_ioclock io, uint32_t freq) */ static uint32_t mx28_get_ioclk(enum mxs_ioclock io) { - struct mx28_clkctrl_regs *clkctrl_regs = - (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE; + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; uint8_t ret; int io_reg; @@ -199,8 +199,8 @@ static uint32_t mx28_get_ioclk(enum mxs_ioclock io) */ void mx28_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal) { - struct mx28_clkctrl_regs *clkctrl_regs = - (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE; + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; uint32_t clk, clkreg; if (ssp > MXC_SSPCLK3) @@ -243,8 +243,8 @@ void mx28_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal) */ static uint32_t mx28_get_sspclk(enum mxs_sspclock ssp) { - struct mx28_clkctrl_regs *clkctrl_regs = - (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE; + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; uint32_t clkreg; uint32_t clk, tmp; @@ -273,12 +273,12 @@ static uint32_t mx28_get_sspclk(enum mxs_sspclock ssp) */ void mx28_set_ssp_busclock(unsigned int bus, uint32_t freq) { - struct mx28_ssp_regs *ssp_regs; + struct mxs_ssp_regs *ssp_regs; const uint32_t sspclk = mx28_get_sspclk(bus); uint32_t reg; uint32_t divide, rate, tgtclk; - ssp_regs = (struct mx28_ssp_regs *)(MXS_SSP0_BASE + (bus * 0x2000)); + ssp_regs = (struct mxs_ssp_regs *)(MXS_SSP0_BASE + (bus * 0x2000)); /* * SSP bit rate = SSPCLK / (CLOCK_DIVIDE * (1 + CLOCK_RATE)), diff --git a/arch/arm/cpu/arm926ejs/mxs/mx28.c b/arch/arm/cpu/arm926ejs/mxs/mx28.c index 65fcd75..dc271cf 100644 --- a/arch/arm/cpu/arm926ejs/mxs/mx28.c +++ b/arch/arm/cpu/arm926ejs/mxs/mx28.c @@ -51,10 +51,10 @@ void reset_cpu(ulong ignored) __attribute__((noreturn)); void reset_cpu(ulong ignored) { - struct mx28_rtc_regs *rtc_regs = - (struct mx28_rtc_regs *)MXS_RTC_BASE; - struct mx28_lcdif_regs *lcdif_regs = - (struct mx28_lcdif_regs *)MXS_LCDIF_BASE; + struct mxs_rtc_regs *rtc_regs = + (struct mxs_rtc_regs *)MXS_RTC_BASE; + struct mxs_lcdif_regs *lcdif_regs = + (struct mxs_lcdif_regs *)MXS_LCDIF_BASE; /* * Shut down the LCD controller as it interferes with BootROM boot mode @@ -155,8 +155,8 @@ int arch_misc_init(void) int arch_cpu_init(void) { - struct mx28_clkctrl_regs *clkctrl_regs = - (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE; + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; extern uint32_t _start; mx28_fixup_vt((uint32_t)&_start); @@ -190,8 +190,8 @@ int arch_cpu_init(void) #if defined(CONFIG_DISPLAY_CPUINFO) static const char *get_cpu_type(void) { - struct mx28_digctl_regs *digctl_regs = - (struct mx28_digctl_regs *)MXS_DIGCTL_BASE; + struct mxs_digctl_regs *digctl_regs = + (struct mxs_digctl_regs *)MXS_DIGCTL_BASE; switch (readl(&digctl_regs->hw_digctl_chipid) & HW_DIGCTL_CHIPID_MASK) { case HW_DIGCTL_CHIPID_MX28: @@ -203,8 +203,8 @@ static const char *get_cpu_type(void) static const char *get_cpu_rev(void) { - struct mx28_digctl_regs *digctl_regs = - (struct mx28_digctl_regs *)MXS_DIGCTL_BASE; + struct mxs_digctl_regs *digctl_regs = + (struct mxs_digctl_regs *)MXS_DIGCTL_BASE; uint8_t rev = readl(&digctl_regs->hw_digctl_chipid) & 0x000000FF; switch (readl(&digctl_regs->hw_digctl_chipid) & HW_DIGCTL_CHIPID_MASK) { @@ -249,8 +249,8 @@ int do_mx28_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) #ifdef CONFIG_CMD_NET int cpu_eth_init(bd_t *bis) { - struct mx28_clkctrl_regs *clkctrl_regs = - (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE; + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; /* Turn on ENET clocks */ clrbits_le32(&clkctrl_regs->hw_clkctrl_enet, @@ -291,8 +291,8 @@ void mx28_adjust_mac(int dev_id, unsigned char *mac) #define MXS_OCOTP_MAX_TIMEOUT 1000000 void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) { - struct mx28_ocotp_regs *ocotp_regs = - (struct mx28_ocotp_regs *)MXS_OCOTP_BASE; + struct mxs_ocotp_regs *ocotp_regs = + (struct mxs_ocotp_regs *)MXS_OCOTP_BASE; uint32_t data; memset(mac, 0, 6); diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c index 88a603c..c1df81d 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c @@ -32,7 +32,7 @@ void mx28_lradc_init(void) { - struct mx28_lradc_regs *regs = (struct mx28_lradc_regs *)MXS_LRADC_BASE; + struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE; writel(LRADC_CTRL0_SFTRST, ®s->hw_lradc_ctrl0_clr); writel(LRADC_CTRL0_CLKGATE, ®s->hw_lradc_ctrl0_clr); @@ -51,7 +51,7 @@ void mx28_lradc_init(void) void mx28_lradc_enable_batt_measurement(void) { - struct mx28_lradc_regs *regs = (struct mx28_lradc_regs *)MXS_LRADC_BASE; + struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE; /* Check if the channel is present at all. */ if (!(readl(®s->hw_lradc_status) & LRADC_STATUS_CHANNEL7_PRESENT)) diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index cca1316..e7ed5e0 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c @@ -100,8 +100,8 @@ void init_mx28_200mhz_ddr2(void) void mx28_mem_init_clock(void) { - struct mx28_clkctrl_regs *clkctrl_regs = - (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE; + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; /* Gate EMI clock */ writeb(CLKCTRL_FRAC_CLKGATE, @@ -131,8 +131,8 @@ void mx28_mem_init_clock(void) void mx28_mem_setup_cpu_and_hbus(void) { - struct mx28_clkctrl_regs *clkctrl_regs = - (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE; + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; /* Set fractional divider for ref_cpu to 480 * 18 / 19 = 454MHz * and ungate CPU clock */ @@ -163,8 +163,8 @@ void mx28_mem_setup_cpu_and_hbus(void) void mx28_mem_setup_vdda(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; writel((0xc << POWER_VDDACTRL_TRG_OFFSET) | (0x7 << POWER_VDDACTRL_BO_OFFSET_OFFSET) | @@ -174,8 +174,8 @@ void mx28_mem_setup_vdda(void) void mx28_mem_setup_vddd(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; writel((0x1c << POWER_VDDDCTRL_TRG_OFFSET) | (0x7 << POWER_VDDDCTRL_BO_OFFSET_OFFSET) | @@ -204,10 +204,10 @@ uint32_t mx28_mem_get_size(void) void mx28_mem_init(void) { - struct mx28_clkctrl_regs *clkctrl_regs = - (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE; - struct mx28_pinctrl_regs *pinctrl_regs = - (struct mx28_pinctrl_regs *)MXS_PINCTRL_BASE; + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; + struct mxs_pinctrl_regs *pinctrl_regs = + (struct mxs_pinctrl_regs *)MXS_PINCTRL_BASE; /* Set DDR2 mode */ writel(PINCTRL_EMI_DS_CTRL_DDR_MODE_DDR2, diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c index 4b09b0c..763549e 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c @@ -32,8 +32,8 @@ void mx28_power_clock2xtal(void) { - struct mx28_clkctrl_regs *clkctrl_regs = - (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE; + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; /* Set XTAL as CPU reference clock */ writel(CLKCTRL_CLKSEQ_BYPASS_CPU, @@ -42,8 +42,8 @@ void mx28_power_clock2xtal(void) void mx28_power_clock2pll(void) { - struct mx28_clkctrl_regs *clkctrl_regs = - (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE; + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; setbits_le32(&clkctrl_regs->hw_clkctrl_pll0ctrl0, CLKCTRL_PLL0CTRL0_POWER); @@ -54,8 +54,8 @@ void mx28_power_clock2pll(void) void mx28_power_clear_auto_restart(void) { - struct mx28_rtc_regs *rtc_regs = - (struct mx28_rtc_regs *)MXS_RTC_BASE; + struct mxs_rtc_regs *rtc_regs = + (struct mxs_rtc_regs *)MXS_RTC_BASE; writel(RTC_CTRL_SFTRST, &rtc_regs->hw_rtc_ctrl_clr); while (readl(&rtc_regs->hw_rtc_ctrl) & RTC_CTRL_SFTRST) @@ -87,8 +87,8 @@ void mx28_power_clear_auto_restart(void) void mx28_power_set_linreg(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; /* Set linear regulator 25mV below switching converter */ clrsetbits_le32(&power_regs->hw_power_vdddctrl, @@ -106,8 +106,8 @@ void mx28_power_set_linreg(void) int mx28_get_batt_volt(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; uint32_t volt = readl(&power_regs->hw_power_battmonitor); volt &= POWER_BATTMONITOR_BATT_VAL_MASK; volt >>= POWER_BATTMONITOR_BATT_VAL_OFFSET; @@ -122,8 +122,8 @@ int mx28_is_batt_ready(void) int mx28_is_batt_good(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; uint32_t volt = mx28_get_batt_volt(); if ((volt >= 2400) && (volt <= 4300)) @@ -162,8 +162,8 @@ int mx28_is_batt_good(void) void mx28_power_setup_5v_detect(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; /* Start 5V detection */ clrsetbits_le32(&power_regs->hw_power_5vctrl, @@ -174,8 +174,8 @@ void mx28_power_setup_5v_detect(void) void mx28_src_power_init(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; /* Improve efficieny and reduce transient ripple */ writel(POWER_LOOPCTRL_TOGGLE_DIF | POWER_LOOPCTRL_EN_CM_HYST | @@ -205,8 +205,8 @@ void mx28_src_power_init(void) void mx28_power_init_4p2_params(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; /* Setup 4P2 parameters */ clrsetbits_le32(&power_regs->hw_power_dcdc4p2, @@ -229,8 +229,8 @@ void mx28_power_init_4p2_params(void) void mx28_enable_4p2_dcdc_input(int xfer) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; uint32_t tmp, vbus_thresh, vbus_5vdetect, pwd_bo; uint32_t prev_5v_brnout, prev_5v_droop; @@ -325,8 +325,8 @@ void mx28_enable_4p2_dcdc_input(int xfer) void mx28_power_init_4p2_regulator(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; uint32_t tmp, tmp2; setbits_le32(&power_regs->hw_power_dcdc4p2, POWER_DCDC4P2_ENABLE_4P2); @@ -409,8 +409,8 @@ void mx28_power_init_4p2_regulator(void) void mx28_power_init_dcdc_4p2_source(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; if (!(readl(&power_regs->hw_power_dcdc4p2) & POWER_DCDC4P2_ENABLE_DCDC)) { @@ -431,8 +431,8 @@ void mx28_power_init_dcdc_4p2_source(void) void mx28_power_enable_4p2(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; uint32_t vdddctrl, vddactrl, vddioctrl; uint32_t tmp; @@ -490,8 +490,8 @@ void mx28_power_enable_4p2(void) void mx28_boot_valid_5v(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; /* * Use VBUSVALID level instead of VDD5V_GT_VDDIO level to trigger a 5V @@ -513,8 +513,8 @@ void mx28_boot_valid_5v(void) void mx28_powerdown(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; writel(POWER_RESET_UNLOCK_KEY, &power_regs->hw_power_reset); writel(POWER_RESET_UNLOCK_KEY | POWER_RESET_PWD_OFF, &power_regs->hw_power_reset); @@ -522,8 +522,8 @@ void mx28_powerdown(void) void mx28_batt_boot(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; clrbits_le32(&power_regs->hw_power_5vctrl, POWER_5VCTRL_PWDN_5VBRNOUT); clrbits_le32(&power_regs->hw_power_5vctrl, POWER_5VCTRL_ENABLE_DCDC); @@ -566,8 +566,8 @@ void mx28_batt_boot(void) void mx28_handle_5v_conflict(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; uint32_t tmp; setbits_le32(&power_regs->hw_power_vddioctrl, @@ -598,8 +598,8 @@ void mx28_handle_5v_conflict(void) void mx28_5v_boot(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; /* * NOTE: In original IMX-Bootlets, this also checks for VBUSVALID, @@ -621,8 +621,8 @@ void mx28_5v_boot(void) void mx28_init_batt_bo(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; /* Brownout at 3V */ clrsetbits_le32(&power_regs->hw_power_battmonitor, @@ -635,8 +635,8 @@ void mx28_init_batt_bo(void) void mx28_switch_vddd_to_dcdc_source(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; clrsetbits_le32(&power_regs->hw_power_vdddctrl, POWER_VDDDCTRL_LINREG_OFFSET_MASK, @@ -650,10 +650,10 @@ void mx28_switch_vddd_to_dcdc_source(void) void mx28_power_configure_power_source(void) { int batt_ready, batt_good; - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; - struct mx28_lradc_regs *lradc_regs = - (struct mx28_lradc_regs *)MXS_LRADC_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; + struct mxs_lradc_regs *lradc_regs = + (struct mxs_lradc_regs *)MXS_LRADC_BASE; mx28_src_power_init(); @@ -690,8 +690,8 @@ void mx28_power_configure_power_source(void) void mx28_enable_output_rail_protection(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; writel(POWER_CTRL_VDDD_BO_IRQ | POWER_CTRL_VDDA_BO_IRQ | POWER_CTRL_VDDIO_BO_IRQ, &power_regs->hw_power_ctrl_clr); @@ -708,8 +708,8 @@ void mx28_enable_output_rail_protection(void) int mx28_get_vddio_power_source_off(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; uint32_t tmp; if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) { @@ -736,8 +736,8 @@ int mx28_get_vddio_power_source_off(void) int mx28_get_vddd_power_source_off(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; uint32_t tmp; tmp = readl(&power_regs->hw_power_vdddctrl); @@ -767,8 +767,8 @@ int mx28_get_vddd_power_source_off(void) void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; uint32_t cur_target, diff, bo_int = 0; uint32_t powered_by_linreg = 0; @@ -864,8 +864,8 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout) void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; uint32_t cur_target, diff, bo_int = 0; uint32_t powered_by_linreg = 0; @@ -968,8 +968,8 @@ void mx28_setup_batt_detect(void) void mx28_power_init(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; mx28_power_clock2xtal(); mx28_power_clear_auto_restart(); @@ -998,8 +998,8 @@ void mx28_power_init(void) #ifdef CONFIG_SPL_MX28_PSWITCH_WAIT void mx28_power_wait_pswitch(void) { - struct mx28_power_regs *power_regs = - (struct mx28_power_regs *)MXS_POWER_BASE; + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)MXS_POWER_BASE; while (!(readl(&power_regs->hw_power_sts) & POWER_STS_PSWITCH_MASK)) ; diff --git a/arch/arm/cpu/arm926ejs/mxs/timer.c b/arch/arm/cpu/arm926ejs/mxs/timer.c index 5b73f4a..c4b0f5e 100644 --- a/arch/arm/cpu/arm926ejs/mxs/timer.c +++ b/arch/arm/cpu/arm926ejs/mxs/timer.c @@ -62,8 +62,8 @@ static inline unsigned long us_to_tick(unsigned long us) int timer_init(void) { - struct mx28_timrot_regs *timrot_regs = - (struct mx28_timrot_regs *)MXS_TIMROT_BASE; + struct mxs_timrot_regs *timrot_regs = + (struct mxs_timrot_regs *)MXS_TIMROT_BASE; /* Reset Timers and Rotary Encoder module */ mx28_reset_block(&timrot_regs->hw_timrot_rotctrl_reg); @@ -84,8 +84,8 @@ int timer_init(void) unsigned long long get_ticks(void) { - struct mx28_timrot_regs *timrot_regs = - (struct mx28_timrot_regs *)MXS_TIMROT_BASE; + struct mxs_timrot_regs *timrot_regs = + (struct mxs_timrot_regs *)MXS_TIMROT_BASE; /* Current tick value */ uint32_t now = readl(&timrot_regs->hw_timrot_running_count0); |