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| author | Georges Savoundararadj <savoundg@gmail.com> | 2014-10-28 23:16:11 +0100 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-10-29 09:02:50 -0400 |
| commit | 3ff46cc42b9d73d01c86df904425704410958470 (patch) | |
| tree | a2ccb570c601c6e6b1acba87f46680bb24d58ce3 /arch/arm/cpu | |
| parent | c57a642384df0dfaacc8e9c6c06d76b5aecb965d (diff) | |
| download | u-boot-imx-3ff46cc42b9d73d01c86df904425704410958470.zip u-boot-imx-3ff46cc42b9d73d01c86df904425704410958470.tar.gz u-boot-imx-3ff46cc42b9d73d01c86df904425704410958470.tar.bz2 | |
arm: relocate the exception vectors
This commit relocates the exception vectors.
As ARM1176 and ARMv7 have the security extensions, it uses VBAR. For
the other ARM processors, it copies the relocated exception vectors to
the correct address: 0x00000000 or 0xFFFF0000.
Signed-off-by: Georges Savoundararadj <savoundg@gmail.com>
Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/armv7/start.S | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index fedd7c8..fdc05b9 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -81,12 +81,6 @@ ENTRY(c_runtime_cpu_setup) mcr p15, 0, r0, c7, c10, 4 @ DSB mcr p15, 0, r0, c7, c5, 4 @ ISB #endif -/* - * Move vector table - */ - /* Set vector address in CP15 VBAR register */ - ldr r0, =_start - mcr p15, 0, r0, c12, c0, 0 @Set VBAR bx lr |