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authorSergei Ianovich <ynvich@gmail.com>2013-12-17 05:03:40 +0400
committerMarek Vasut <marex@denx.de>2013-12-18 16:00:37 +0100
commit23f00caf6ebb9bcb804e48f5a4630629f64af471 (patch)
tree53dfe23adb8a16de1152550e82ae03c566011a8c /arch/arm/cpu
parentd2c7074b9593d822e2359a09c21747248fdf5fac (diff)
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ARM: pxa: prevent PXA270 occasional reboot freezes
Erratum 71 of PXA270M Processor Family Specification Update (April 19, 2010) explains that watchdog reset time is just 8us insead of 10ms in EMTS. If SDRAM is not reset, it causes memory bus congestion and the device hangs. We put SDRAM in selfresh mode before watchdog reset, removing potential freezes. Signed-off-by: Sergei Ianovich <ynvich@gmail.com> CC: Marek Vasut <marex@denx.de>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/pxa/pxa2xx.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/cpu/pxa/pxa2xx.c b/arch/arm/cpu/pxa/pxa2xx.c
index c9a7d45..7e861e2 100644
--- a/arch/arm/cpu/pxa/pxa2xx.c
+++ b/arch/arm/cpu/pxa/pxa2xx.c
@@ -279,6 +279,7 @@ void reset_cpu(ulong ignored)
tmp = readl(OSCR);
tmp += 0x1000;
writel(tmp, OSMR3);
+ writel(MDREFR_SLFRSH, MDREFR);
for (;;)
;