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| author | Hans de Goede <hdegoede@redhat.com> | 2015-01-14 19:28:38 +0100 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2015-01-22 12:34:55 +0100 |
| commit | 22b618346acb95dae8fddf151202829b6f78667f (patch) | |
| tree | 41819f5a821efb341f4d48b33a94263bdf4a609d /arch/arm/cpu | |
| parent | 6515032e3b88f0774f93fb05deaf20e48a515fe4 (diff) | |
| download | u-boot-imx-22b618346acb95dae8fddf151202829b6f78667f.zip u-boot-imx-22b618346acb95dae8fddf151202829b6f78667f.tar.gz u-boot-imx-22b618346acb95dae8fddf151202829b6f78667f.tar.bz2 | |
sunxi: Drop pll6 setting from clock_init_uart
As the comment says now that we have SPL support this is no longer necessary,
as PLL6 is already setup with the exact same parameters by the SPL.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/armv7/sunxi/clock_sun6i.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c index d7a7040..e2a7867 100644 --- a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c +++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c @@ -45,10 +45,10 @@ void clock_init_safe(void) void clock_init_uart(void) { +#if CONFIG_CONS_INDEX < 5 struct sunxi_ccm_reg *const ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; -#if CONFIG_CONS_INDEX < 5 /* uart clock source is apb2 */ writel(APB2_CLK_SRC_OSC24M| APB2_CLK_RATE_N_1| @@ -68,9 +68,6 @@ void clock_init_uart(void) /* enable R_PIO and R_UART clocks, and de-assert resets */ prcm_apb0_enable(PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_UART); #endif - - /* Dup with clock_init_safe(), drop once sun6i SPL support lands */ - writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg); } int clock_twi_onoff(int port, int state) |